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path: root/src/northbridge
AgeCommit message (Expand)Author
2020-11-13nb/intel/haswell/acpi: Do not add PEG devices for LPAngel Pons
2020-11-13nb/intel/haswell/acpi: Move PEG and CTDP includes downwardsAngel Pons
2020-11-13nb/intel/haswell/acpi: Merge `haswell.asl` into `hostbridge.asl`Angel Pons
2020-11-13nb/intel/haswell/acpi/hostbridge.asl: Drop unused registersAngel Pons
2020-11-13nb/intel/haswell/acpi/peg.asl: Leverage ASL for DEVENAngel Pons
2020-11-13haswell/lynxpoint: Drop remaining uses of `ISLP` methodAngel Pons
2020-11-09nb/intel/pineview: Fix clearing memoryArthur Heymans
2020-11-04haswell: Add Intel TXT support in romstageAngel Pons
2020-11-04nb/intel/haswell: Place CTDP ASL code in a separate scopeAngel Pons
2020-11-04nb/intel/haswell/acpi: Align with BroadwellAngel Pons
2020-10-31{cpu,nb}/intel/haswell: Drop unnecessary `UL` suffixAngel Pons
2020-10-26src: Include <arch/io.h> when appropriateElyes HAOUAS
2020-10-25nb/intel/haswell/gma.c: Drop unused ChromeOS includeAngel Pons
2020-10-25nb/intel/haswell/gma.c: Drop unused `set_translation_table` functionAngel Pons
2020-10-24nb/intel/haswell/gma.c: Drop space after unary `!`Angel Pons
2020-10-24nb/intel/haswell/gma.c: Move log message to the right placeAngel Pons
2020-10-24nb/intel/haswell/gma.c: Use `config_of` in `gma_setup_panel`Angel Pons
2020-10-24nb/intel/haswell/early_init.c: Remove invalid register writesAngel Pons
2020-10-24nb/intel/haswell/finalize.c: Align with BroadwellAngel Pons
2020-10-24nb/intel/haswell/finalize.c: Align MC locking with BroadwellAngel Pons
2020-10-24nb/intel/haswell/finalize.c: Lock down MC ARB registerAngel Pons
2020-10-24nb/intel/haswell/finalize.c: Lock PCU DDR PTMAngel Pons
2020-10-24nb/intel/haswell/finalize.c: Drop obsolete SA PM lockAngel Pons
2020-10-24nb/intel/haswell/finalize.c: Use PCI register namesAngel Pons
2020-10-24nb/intel/gm45: Clean up header handlingAngel Pons
2020-10-24nb/intel/gm45: Introduce memmap.hAngel Pons
2020-10-24nb/intel/gm45: Add more DMIBAR/EPBAR registersAngel Pons
2020-10-24nb/intel/ironlake: Add more host bridge PCI IDsAngel Pons
2020-10-24nb/intel/ironlake: Generalise northbridge chip nameAngel Pons
2020-10-24nb/intel/haswell: Generalise northbridge chip nameAngel Pons
2020-10-24nb/intel/haswell: Set up Root Complex topologyAngel Pons
2020-10-23nb/intel/haswell/raminit.c: Clean up local variablesAngel Pons
2020-10-23nb/intel/sandybridge: Correct designation of MRC versionAngel Pons
2020-10-23nb/intel/haswell: Correct designation of MRC versionAngel Pons
2020-10-23nb/intel/haswell: Drop ASM to call into MRCAngel Pons
2020-10-23nb/intel/haswell: Constify pointers to stringsAngel Pons
2020-10-23nb/intel/haswell: Make MAD_DIMM_* registers indexedAngel Pons
2020-10-23nb/intel/haswell: Drop unnecessary register readAngel Pons
2020-10-22nb/intel/haswell: Add HASWELL_HIDE_PEG_FROM_MRC optionAngel Pons
2020-10-17intel/txt: Add `txt_get_chipset_dpr` functionAngel Pons
2020-10-15nb/intel/haswell: Account for DPR region in memory mapAngel Pons
2020-10-14nb/intel/x4x: Place raminit definitions in raminit.hAngel Pons
2020-10-14nb/intel/x4x: Move register headers into a subfolderAngel Pons
2020-10-14nb/intel/x4x: Clean up DMIBAR/EPBAR definitionsAngel Pons
2020-10-13nb/intel/ironlake: Put DMIBAR/EPBAR registers into separate filesAngel Pons
2020-10-13nb/intel/sandybridge: Improve cbmem_top_chipset calculationAngel Pons
2020-10-12nb/intel/i945/acpi: Convert i945.asl to ASL 2.0 syntaxElyes HAOUAS
2020-10-10nb/intel/ironlake: Move register headers into a subfolderAngel Pons
2020-10-10nb/intel/ironlake: Clean up DMIBAR/EPBAR registersAngel Pons
2020-10-05nb/intel/ironlake: Drop unnecessary `smm_region_start` functionAngel Pons
2020-10-05nb/intel/ironlake/memmap.c: Clean up includesAngel Pons
2020-10-02drivers/spi: Add BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES configShelley Chen
2020-09-29nb/intel/gm45: Answer question about conversion stepping A1Angel Pons
2020-09-26ironlake: Fix compilation on x86_64Patrick Rudolph
2020-09-25nb/intel/x4x/x4x.h: Clean up cosmeticsAngel Pons
2020-09-25nb/intel/x4x/iomap.h: Rename to memmap.hAngel Pons
2020-09-25nb/intel/pineview: Place raminit definitions in raminit.hAngel Pons
2020-09-25nb/intel/gm45/gm45.h: Clean up cosmeticsAngel Pons
2020-09-25nb/intel/gm45: Drop unused `DEFAULT_HECIBAR` macroAngel Pons
2020-09-25nb/intel/gm45: Drop casts from DEFAULT_{MCHBAR,DMIBAR}Angel Pons
2020-09-22nb/intel/ironlake: Use `MSAC` definitionAngel Pons
2020-09-22nb/intel/ironlake: Use DMIBAR/EPBAR macrosAngel Pons
2020-09-21src/northbridge: Drop unneeded empty linesElyes HAOUAS
2020-09-21nb/intel/sandybridge: Check ME status only onceAngel Pons
2020-09-21nb/intel/sandybridge: Simplify SPD validity checkAngel Pons
2020-09-21nb/intel/ironlake: Clean up cosmetics of early ME functionsAngel Pons
2020-09-21nb/intel/ironlake: Clean up `send_heci_uma_message` signatureAngel Pons
2020-09-21nb/intel/ironlake: Reduce the scope of `heci_uma_addr`Angel Pons
2020-09-21nb/intel/sandybridge: Drop unnecessary `gma.h`Angel Pons
2020-09-21nb/intel/sandybridge: Put DMIBAR/EPBAR registers into separate filesAngel Pons
2020-09-21nb/intel/sandybridge: Move register headers into a subfolderAngel Pons
2020-09-21nb/intel/sandybridge: Clean up DMIBAR/EPBAR registersAngel Pons
2020-09-21nb/intel/sandybridge: Introduce memmap.hAngel Pons
2020-09-17nb/intel/haswell: Put DMIBAR/EPBAR registers into separate filesAngel Pons
2020-09-17nb/intel/haswell: Move register headers into a subfolderAngel Pons
2020-09-17nb/intel/x4x: Clean up TPM-related codeAngel Pons
2020-09-17nb/intel/pineview: Guard DMIBAR/EPBAR macro parametersAngel Pons
2020-09-17nb/intel/pineview/iomap.h: Rename to memmap.hAngel Pons
2020-09-17nb/intel/ironlake: Do not re-read ME UMA sizeAngel Pons
2020-09-17nb/intel/ironlake: Drop some unused function parametersAngel Pons
2020-09-17nb/intel/ironlake: Drop `heci_bar` field from raminitAngel Pons
2020-09-17nb/intel/haswell: Clean up register definitionsAngel Pons
2020-09-17nb/intel/haswell: Guard DMIBAR/EPBAR macro parametersAngel Pons
2020-09-17nb/intel/haswell: Introduce memmap.hAngel Pons
2020-09-17nb/intel/sandybridge: Drop `void *` cast in `MCHBAR32`Angel Pons
2020-09-17nb/intel/sandybridge: Drop casts from DEFAULT_{MCHBAR,DMIBAR}Angel Pons
2020-09-17nb/intel/sandybridge: Drop invalid `DEFAULT_RCBABASE` macroAngel Pons
2020-09-17nb/intel/ironlake: Drop invalid `DEFAULT_RCBABASE` macroAngel Pons
2020-09-15nb/intel/ironlake/raminit: Work around compiler bugPatrick Rudolph
2020-09-14nb/intel/ironlake: Reserve gap betwen TSEG and BGSMNico Huber
2020-09-14nb/intel/ironlake: Use an `index` variable for resourcesNico Huber
2020-09-08nb/intel/ironlake: Use an enum for `gpu_panel_port_select`Angel Pons
2020-09-08nb/intel/sandybridge: Use an enum for `gpu_panel_port_select`Angel Pons
2020-09-08nb/intel/haswell: Drop `gpu_panel_port_select`Angel Pons
2020-09-02src: Drop redundant 'select BOOTBLOCK_CONSOLE'Elyes HAOUAS
2020-09-02{nb,soc}/intel/{haswell,broadwell}/memmap.c: Use ALIGN_DOWN(x, a)Elyes HAOUAS
2020-08-31nb/intel/sandybridge: Add ECC error injection register informationAngel Pons
2020-08-24mrc_cache: Add mrc_cache fetch functions to support non-x86 platformsShelley Chen
2020-08-24nb/amd/agesa: define DDR3_SPD_SIZE as a common valueMike Banon
2020-08-18src: Remove unused 'include <delay.h>'Elyes HAOUAS
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