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path: root/src/northbridge
AgeCommit message (Expand)Author
2018-06-04northbridge/intel: Remove unneeded includesElyes HAOUAS
2018-06-02intel/socket_mPGA604 intel/e7505: Switch to POSTCAR_STAGEKyösti Mälkki
2018-06-02intel/e7505: Move to RELOCATABLE_RAMSTAGEKyösti Mälkki
2018-06-02intel/e7505: Assume AGP slot disabledKyösti Mälkki
2018-06-02aopen/dxplplusu intel/e7505: Move to EARLY_CBMEM_INITKyösti Mälkki
2018-06-02intel/e7505: Fix domain resourcesKyösti Mälkki
2018-05-31{cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriateNico Huber
2018-05-31Remove VIA VX800 northbridge supportKyösti Mälkki
2018-05-31Remove VIA CX700 northbridge supportKyösti Mälkki
2018-05-31Remove VIA CN700 northbridge supportKyösti Mälkki
2018-05-31Remove AMD K8 cpu and northbridge supportKyösti Mälkki
2018-05-31Remove southbridges after K8 board removalsKyösti Mälkki
2018-05-31Remove all AMD K8 boardsKyösti Mälkki
2018-05-29src/northbridge: Add and update license headersMartin Roth
2018-05-24nb/intel/fsp_sandybridge: Fix lost const qualifier on 'device_t'Elyes HAOUAS
2018-05-24AMD geode/lx: Remove generic_sdram.c includeKyösti Mälkki
2018-05-24Remove leftover AMD CIMX RD890 northbridge supportKyösti Mälkki
2018-05-24nb/amd/amdfam10: Get rid of device_tKyösti Mälkki
2018-05-24nb/intel/x4x: Adapt post JEDEC for DDR3Arthur Heymans
2018-05-24nb/intel/x4x/raminit: Add DDR3 enhanced mode and power settingsArthur Heymans
2018-05-24nb/intel/x4x/raminit: Add DDR3 specific dra/drb settingsArthur Heymans
2018-05-24nb/intel/x4x: Implement write levelingArthur Heymans
2018-05-24nb/intel/x4x: Add DDR3 JEDEC initArthur Heymans
2018-05-24nb/intel/sandybridge: Get rid of device_tElyes HAOUAS
2018-05-23nb/amd/pi: Get rid of device_tKyösti Mälkki
2018-05-23nb/amd/agesa: Get rid of device_tKyösti Mälkki
2018-05-21nb/amd/amdk8: Get rid of device_tElyes HAOUAS
2018-05-21nb/via/cx700: Get rid of device_tElyes HAOUAS
2018-05-21nb/via/vx800: Get rid of device_tElyes HAOUAS
2018-05-21nb/via/cn700: Get rid of device_tElyes HAOUAS
2018-05-21nb/intel/nehalem: Fix smashed stack in romstageMatthias Gazzari
2018-05-20nb/amd/agesa/family14: Get rid of device_tElyes HAOUAS
2018-05-20nb/amd/agesa/family12: Get rid of device_tElyes HAOUAS
2018-05-19via/vx900: Remove leftover codeKyösti Mälkki
2018-05-18nb/common/intel: Remove the mrc cache codeArthur Heymans
2018-05-18nb/intel/nehalem: Use the common mrc cache driverArthur Heymans
2018-05-18nb/intel/e7505: Get rid of device_tElyes HAOUAS
2018-05-18nb/intel/haswell: Get rid of device_tElyes HAOUAS
2018-05-17nb/intel/nehalem: Add ACPI pathPatrick Rudolph
2018-05-16vx900: Move to EARLY_CBMEM_INITLubomir Rintel
2018-05-14nb/intel/fsp_sandybridge: Get rid of device_tElyes HAOUAS
2018-05-14nb/intel/i945/raminit.c: Remove not necessary braces {}Elyes HAOUAS
2018-05-14nb/intel/x4x/raminit: DDR3 specific ODTArthur Heymans
2018-05-14nb/intel/x4x: Add DDR3 rcompArthur Heymans
2018-05-14nb/intel/x4x/raminit: Support programming initials DD3 DLL settingArthur Heymans
2018-05-14nb/intel/x4x/raminit: Support programming DDR3 timingsArthur Heymans
2018-05-14nb/intel/x4x/raminit: Make programming launch ddr3 specificArthur Heymans
2018-05-14nb/intel/x4x/raminit: Make programming crossclock support DDR3Arthur Heymans
2018-05-14nb/intel/x4x: Rename a things that are not specific to DDR2Arthur Heymans
2018-05-14nb/x4x/raminit: Decode ddr3 dimmsArthur Heymans
2018-05-14nb/intel/x4x/raminit: Fix programming dual channel registersArthur Heymans
2018-05-14agesa/family16kb/northbridge: report acpi namespaceKevin Cody-Little
2018-05-11nb/intel/i945/bootblock.c: Correct commentElyes HAOUAS
2018-05-11nb/intel/i440bx: Get rid of device_tElyes HAOUAS
2018-05-09{device,drivers,lib,mb,nb}: Use only one space after 'if'Elyes HAOUAS
2018-05-08{mb,nb,soc}: Remove references to pci_bus_default_ops()Nico Huber
2018-05-04amd/mct/ddr3: Correctly configure CsMux67Patrick Georgi
2018-05-01nb/intel/x4x: Change memory layout to improve MTRRArthur Heymans
2018-05-01nb/intel/x4x: Fix programming CxDRBArthur Heymans
2018-05-01nb/intel/x4x: Implement both read and write trainingArthur Heymans
2018-05-01Fix freeze during chipset lockdown on NehalemMatthias Gazzari
2018-04-30nb/intel/fsp_rangeley: Get rid of device_tElyes HAOUAS
2018-04-30nb/intel/i440: Get rid of device_tElyes HAOUAS
2018-04-30nb/intel/pineview: Get rid of device_tElyes HAOUAS
2018-04-30nb/intel/sandybridge: Get rid of device_tElyes HAOUAS
2018-04-30nb/intel/nehalem: Get rid of device_tElyes HAOUAS
2018-04-30nb/x4x: Get rid of device_tElyes HAOUAS
2018-04-30nb/intel/i945: Get rid of device_tElyes HAOUAS
2018-04-30nb/intel/gm45: Get rid of device_tElyes HAOUAS
2018-04-28nb/intel/x4x: Fix computing page_sizeArthur Heymans
2018-04-28nb/intel/i945/gma: Skip native VGA init for ACPI S3 resumePaul Menzel
2018-04-28nb/intel/i945/gma: Factor out code to new `gma_ngi()`Paul Menzel
2018-04-25vx900: Drop some unused definesLubomir Rintel
2018-04-24compiler.h: add __weak macroAaron Durbin
2018-04-20pci: Move inline PCI functions to pci_ops.hPatrick Rudolph
2018-04-17nb/intel/x4x/rcven.c: Change the verbosity of some messagesArthur Heymans
2018-04-17nb/intel/x4x: Add a convenient macro to loop over bytelanesArthur Heymans
2018-04-17nb/intel/x4x: Clarify the raminit memory mappingArthur Heymans
2018-04-17nb/intel/x4x: Refactor setting default dll settingsArthur Heymans
2018-04-17nb/intel/x4x: Use SPI flash to cache raminit resultsArthur Heymans
2018-04-16nb/intel/i945/gma: Log native graphics init in level INFOPaul Menzel
2018-04-16nb/intel/i945/gma: Fix aligment of equal signPaul Menzel
2018-04-16nb/intel/sandybridge: support more XMP timingsDan Elkouby
2018-04-13nb/intel/sandybridge/peg: Add PEG driver stubPatrick Rudolph
2018-04-11Revert "model_206ax: Use parallel MP init"Arthur Heymans
2018-04-11model_206ax: Use parallel MP initArthur Heymans
2018-04-10cpu/intel/sandybridge: Put stage cache into TSEGArthur Heymans
2018-04-09intel/nehalem post-car: Use postcar_frame for MTRR setupKyösti Mälkki
2018-04-04nb/intel/gm45/raminit: Use CxDRT*_MCHBAR instead of magic numbersJonathan Neuschäfer
2018-03-28nb/intel/gm45: Allocate a 8M TSEG regionArthur Heymans
2018-03-08nb/intel/haswell;sb/intel/lynxpoint: Enable VT-d and X2APICMatt DeVillier
2018-03-08nb/intel/haswell: Generate ACPI DMAR tableMatt DeVillier
2018-03-03nb/intel/i945/gma: Log configured VGA modePaul Menzel
2018-02-27sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common locationArthur Heymans
2018-02-22device/ddr2,ddr3: Rename and move a few thingsArthur Heymans
2018-02-20nb/x4x/raminit_ddr2: Refactor clock configuration slightlyJonathan Neuschäfer
2018-02-06nb/intel/sandybridge: Always use the same MMCONF_BASE_ADDRESSArthur Heymans
2018-02-06nb/intel/haswell: Use the common MRC cache driverArthur Heymans
2018-02-02nb/intel/sandybridge: Add required space before opening parenthesis '('Elyes HAOUAS
2018-01-31nb/intel/*.h: Remove left-over register definitionsPatrick Rudolph
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