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northbridge
Age
Commit message (
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Author
2012-07-24
Make ACPI code detect Sandy/Ivy Bridge dynamically
Stefan Reinauer
2012-07-24
Drop (empty) sandybridge_late_initialization()
Stefan Reinauer
2012-07-24
Add support for HM70 and NM70 LPC bridge
Stefan Reinauer
2012-07-24
Print PCI ID of PCH during boot up
Stefan Reinauer
2012-07-24
Drop leading spaces from CPU name string
Stefan Reinauer
2012-07-24
Fix MRC cache update delays
Stefan Reinauer
2012-07-24
SandyBridge: Add another PCI device ID for northbridge
Walter Murphy
2012-07-24
Fixes to enable RC6 on IvyBridge
Duncan Laurie
2012-07-22
i945: Disable IGD if plugin VGA is preferred
Patrick Georgi
2012-07-22
Trinity wrapper code improvement.
zbao
2012-07-20
Fix udelay() implementation for i945 romstage
Nico Huber
2012-07-20
Drop VGA_BRIDGE_SETUP config option
Patrick Georgi
2012-07-20
Intel SCH northbridge: fix resource index
Kyösti Mälkki
2012-07-16
Drop invalid device ops on Agesa northbridge
Kyösti Mälkki
2012-07-16
AMD: Fix GFXUMA with 4GB or more RAM
Kyösti Mälkki
2012-07-16
Move setup_uma_memory() to K8 northbridge
Kyösti Mälkki
2012-07-16
Move setup_uma_memory() to AMDFAM10 northbridge
Kyösti Mälkki
2012-07-16
Move setup_uma_memory() to Agesa Family14 northbridge
Kyösti Mälkki
2012-07-16
Move setup_uma_memory() to Agesa Family12 northbridge
Kyösti Mälkki
2012-07-16
Move setup_uma_memory() to Agesa Family15 northbridge
Kyösti Mälkki
2012-07-16
Define global uma_memory variables
Kyösti Mälkki
2012-07-16
Add global uma_resource()
Kyösti Mälkki
2012-07-16
i5000: Fix resource allocation
Sven Schnelle
2012-07-09
i5000: reset system if raminit fails
Sven Schnelle
2012-07-06
i5000: Add PCI ids for all i5000 flavours
Sven Schnelle
2012-07-06
i945: Reset IGD on boot
Patrick Georgi
2012-07-03
AGESA F15 wrapper for Trinity
zbao
2012-06-21
Don't use 64-bit constant 0x100000000 in linker scripts
Nico Huber
2012-06-20
i5000: fix another typo
Sven Schnelle
2012-06-20
i5000: fix typos
Sven Schnelle
2012-06-18
i5000: enforce hard reset
Sven Schnelle
2012-05-29
Sandybridge: Remove remnants of FDT support from MRC cache code
Stefan Reinauer
2012-05-29
Sandybridge: Fix MRC cache calculation
Stefan Reinauer
2012-05-24
cbtypes.h: Unify cbtypes.h used in AMD board's code
Vikram Narayanan
2012-05-11
Hook up MRC cache update
Stefan Reinauer
2012-05-11
Rework Sandybridge MRC cache handling
Stefan Reinauer
2012-05-08
Some more #if cleanup
Patrick Georgi
2012-05-08
Clean up #ifs
Patrick Georgi
2012-05-03
Add missing newline to printk in Sandybridge init code
Stefan Reinauer
2012-05-02
Make Intel i5000 specific options only appear on i5000 systems
Stefan Reinauer
2012-05-02
Strip quotes from Sandybridge MRC blob
Stefan Reinauer
2012-05-02
Sandybridge: Display platform information early
Vadim Bendebury
2012-05-01
Update Ivybridge GT power meter tables
Duncan Laurie
2012-05-01
Update ivybridge graphics initialization
Duncan Laurie
2012-05-01
Only send ME Dram Init Done message on Sandybridge
Duncan Laurie
2012-05-01
Modify DMI init for IvyBridge
Vincent Palatin
2012-05-01
Fix Sandybridge/Ivybridge mainboards according to code review
Stefan Reinauer
2012-04-30
Sandybridge: Temporarily disable MRC cache finding code
Stefan Reinauer
2012-04-30
Add default map_oprom_vendev() for AMD Family 14h processors.
Martin Roth
2012-04-28
Reverse Vendor ID & Device ID for map_oprom_vendev()
Martin Roth
2012-04-27
SMM: Add udelay on Sandybridge systems
Stefan Reinauer
2012-04-21
Intel e7505: build as separate object file
Kyösti Mälkki
2012-04-21
Intel e7505: enable ECC scrubbing
Kyösti Mälkki
2012-04-20
Refactor some alignment handling
Patrick Georgi
2012-04-19
Intel e7505: refactor only
Kyösti Mälkki
2012-04-17
Intel e7505: handlers for undocumented registers
Kyösti Mälkki
2012-04-16
S3 code in coreboot public folder.
zbao
2012-04-12
Unify IO APIC address specification
Patrick Georgi
2012-04-11
Intel e7505: cleanups
Kyösti Mälkki
2012-04-11
Intel e7505: renames only
Kyösti Mälkki
2012-04-05
amdfam10: add phenom II as known cpu
Bernhard Urban
2012-04-05
Add support for Intel Sandybridge CPU (northbridge part)
Stefan Reinauer
2012-03-27
Add the support for RDC R8610 Northbridge
Rudolf Marek
2012-03-16
Fix AMD Fam15 CBMEM allocation
Stefan Reinauer
2012-03-16
Fix AMD Fam12 CBMEM allocation
Stefan Reinauer
2012-03-16
Fix AMD Fam10 CBMEM allocation
Stefan Reinauer
2012-03-16
AMD Agesa: delete no-op bootblock files
Kyösti Mälkki
2012-03-16
Rename AMD_AGESA to CPU_AMD_AGESA
Kyösti Mälkki
2012-03-16
Fix AMD Agesa leaking Kconfig
Kyösti Mälkki
2012-03-16
Intel northbridge I945: Apply un-written naming rules
Kyösti Mälkki
2012-03-16
VIA southbridge K8T890: Apply un-written naming rules
Kyösti Mälkki
2012-03-16
Fix AMD Fam14 cbmen allocation
Marc Jones
2012-03-15
Clean up whitespace in fam14 northbridge.c
Marc Jones
2012-03-07
Move C labels to start-of-line
Patrick Georgi
2012-03-02
Fix ECC disable option for AMD Fam10 DDR2 and DDR3.
Marc Jones
2012-02-17
Avoid ../../.. paths in ASL files
Patrick Georgi
2012-02-17
Rename i945 ACPI files to not carry an i945_ prefix
Patrick Georgi
2012-02-17
Remove whitespace.
Patrick Georgi
2012-02-16
AGESA F15: AGESA family15 model 00-0fh northbridge wrapper
Kerry Sheh
2012-02-16
RD890: AMD RD890/SR56X0 CIMX wrapper
Kerry Sheh
2012-02-10
Remove non-existent include
Sven Schnelle
2012-02-10
i5000: halt second BSP
Sven Schnelle
2012-02-02
Add Intel i5000 Memory Controller Hub
Sven Schnelle
2012-01-31
northbridge/intel/i945: CHECK_SLFRCS_ON_RESUME Kconfig option
Peter Stuge
2012-01-26
Make Geode GX2 VGA setup work.
Nils Jacobs
2012-01-10
i945: fix tsc udelay()
Sven Schnelle
2012-01-07
Update geode GX2 tree to match LX.
Nils Jacobs
2012-01-05
Clean up AMD Fam14 SSDT
Marc Jones
2011-12-31
White space and coding style fixes.
Nils Jacobs
2011-12-14
k8: add CONFIG_K8_FORCE_2T_DRAM_TIMING and enable it for asus k8v-x
Florian Zumbiehl
2011-12-02
Change AMD vendorcode build
Kyösti Mälkki
2011-11-23
k8 raminit: fix bug, improve clock selection, add clock limit for sock754
Florian Zumbiehl
2011-11-16
fix DDR_MASK in load-dependent clock limiting for socket 939 in k8 raminit
Florian Zumbiehl
2011-11-07
Cycle time at CAS Latency (CLX - 2) is at 25 in DDR2 SPD, not at 26
Florian Zumbiehl
2011-11-01
remove trailing whitespace
Stefan Reinauer
2011-10-31
Add support for E7505 northbridge.
Kyösti Mälkki
2011-10-28
Clear improper use of CONFIG_CACHE_AS_RAM
Kyösti Mälkki
2011-10-28
copy e7501 component to e7505
Stefan Reinauer
2011-10-19
I945: replace #if defined() by #if
Sven Schnelle
2011-10-15
AMD CPU and chipset fixes for compilation with gcc 4.6
Stefan Reinauer
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