Age | Commit message (Expand) | Author |
2020-02-24 | treewide: Capitalize 'CMOS' | Elyes HAOUAS |
2020-02-24 | src: capitalize 'RAM' | Elyes HAOUAS |
2020-02-21 | nb/intel/snb: Add PCI routing table for PEG root ports | James Ye |
2020-02-18 | nb/intel/sandybridge: Add Xeon E3-1200 (v1) hostbridge PCI ID | Jonathan A. Kollasch |
2020-02-18 | nb/intel/sandybridge: use list of northbridge device IDs | Jonathan A. Kollasch |
2020-02-17 | nb/intel/gm45: Fix typo in console message | Elyes HAOUAS |
2020-02-17 | nb/intel/nehalem: Remove unused MRC_CACHE_SIZE | Elyes HAOUAS |
2020-02-12 | nb/intel/sandybridge/acpi: Fix MMCONF size computation | Patrick Rudolph |
2020-02-12 | nb/intel/sandybridge/acpi: Update PEG code | Patrick Rudolph |
2020-02-06 | nb/intel/haswell: Fix type definition of dev in PCI_FUNC(dev) | Chris Morgan |
2020-02-01 | nb/intel/sandybridge: improve indexed register helper macros | Felix Held |
2020-01-29 | nb/intel/i945: Use boot path macros | Paul Menzel |
2020-01-27 | nb/intel/sandybridge/raminit_common.h: add missing stdint.h include | Felix Held |
2020-01-27 | nb/intel/sandybridge: replace NORTHBRIDGE with HOST_BRIDGE define | Felix Held |
2020-01-26 | intel/i440bx: Resolve long standing raminit TODOs | Keith Hui |
2020-01-26 | intel/i440bx: Add timestamp to RAM init | Keith Hui |
2020-01-26 | intel/i440bx: Use smbus_read_byte() for raminit debug | Keith Hui |
2020-01-16 | nb/intel/sandybridge: sort LANEBASE_* defines by their address | Felix Held |
2020-01-16 | nb/intel/sandybridge: add macros for byte lane register offsets | Felix Held |
2020-01-16 | nb/intel/sandybridge: refactor code around lane_base[] | Felix Held |
2020-01-15 | nb/intel/sandybridge: refactor lane_registers[] | Felix Held |
2020-01-15 | nb/intel/sandybridge: drop LyCx(r, x, y) macro | Felix Held |
2020-01-15 | nb/intel/sandybridge: Repurpose HOST_BRIDGE macro | Angel Pons |
2020-01-14 | intel/nehalem,ibexpeak: Move enable_smbus() call | Kyösti Mälkki |
2020-01-14 | intel/sandybridge,bd82x6x: Move enable_smbus() call | Kyösti Mälkki |
2020-01-14 | intel/{gm45,x4x},i82801{ix|jx}: Move enable_smbus() call | Kyösti Mälkki |
2020-01-14 | intel/{i945,pineview},i82801gx: Move enable_smbus() call | Kyösti Mälkki |
2020-01-14 | nb/intel/sandybridge: Drop 'or zero' instances | Angel Pons |
2020-01-12 | intel/e7505: Always enable DIMM compatibility checks | Kyösti Mälkki |
2020-01-12 | intel/e7505: Remove commented out suspicious code | Kyösti Mälkki |
2020-01-12 | intel/e7505,i82801dx: Refactor raminit | Kyösti Mälkki |
2020-01-12 | aopen/dxplplusu,intel/e7505: Move mainboard_romstage_entry() | Kyösti Mälkki |
2020-01-12 | intel/e7505,i82801dx: Remove wrapper spd_read_byte() | Kyösti Mälkki |
2020-01-12 | asus/{p2b-x,p3b-f},intel/i440bx: Move mainboard_romstage_entry() | Kyösti Mälkki |
2020-01-12 | intel/i440bx,i82371: Remove wrapper spd_read_byte() | Kyösti Mälkki |
2020-01-12 | asus/p3b-f,intel/i440bx: Move enable/disable_spd() call | Kyösti Mälkki |
2020-01-11 | nb/intel/sandybridge: Tidy up raminit code | Angel Pons |
2020-01-10 | nb/intel/{i945,sandybridge}/bootblock.c: Fix typo | Elyes HAOUAS |
2020-01-10 | nb/intel/sandybridge: Add a bunch of MCHBAR defines | Angel Pons |
2020-01-09 | device,sb/intel: Move SMBus host controller prototypes | Kyösti Mälkki |
2020-01-09 | nb/intel/{i945,x4x,pineview}: Remove wrapper spd_read_byte() | Kyösti Mälkki |
2020-01-09 | drivers/pc80/rtc: Separate {get|set}_option() prototypes | Kyösti Mälkki |
2020-01-09 | nb/intel/sandybridge: Make MCHBAR arithmetics consistent | Angel Pons |
2020-01-06 | drivers/pc80/rtc: Swap cmos_write32() parameter order | Kyösti Mälkki |
2020-01-02 | src: Remove unneeded 'include <arch/io.h>' | Elyes HAOUAS |
2020-01-01 | nb/intel/sandybridge: replace .val_4028 with .io_latency | Felix Held |
2020-01-01 | nb/intel/sandybridge/sandybridge.h: Do cosmetic fixes | Angel Pons |
2020-01-01 | nb/intel/sandybridge: Use the MC_BIOS_DATA define | Angel Pons |
2020-01-01 | nb/intel/sandybridge: Make `PM_PDWN_Config` uppercase | Angel Pons |
2020-01-01 | nb/intel/sandybridge: add and use memory thermal configuration registers | Felix Held |
2020-01-01 | nb/intel/sandybridge: add and use ME stolen memory and lock bit defines | Felix Held |
2020-01-01 | nb/intel/sandybridge: remove unused duplicate PCIEXBAR define X60BAR | Felix Held |
2020-01-01 | nb/intel/sandybridge: add and use more MCHBAR register defines | Felix Held |
2020-01-01 | nb/intel/sandybridge: move MCHBAR register definitions to sandybridge.h | Felix Held |
2020-01-01 | nb/intel/sandybridge: use MESEG register names from datasheet | Felix Held |
2019-12-31 | src: Remove some romcc workarounds | Jacob Garber |
2019-12-31 | northbridge: Add missing include <device/pci_def.h> | Elyes HAOUAS |
2019-12-29 | nb/intel/sandybridge: simplify ME lock and memory enable bit write | Felix Held |
2019-12-29 | nb/intel/sandybridge: add and use defines for ME base and mask registers | Felix Held |
2019-12-29 | nb/intel/sandybridge: add and use defines for PCI_DEV(0,0,0) registers | Felix Held |
2019-12-27 | arch/x86: Remove <arch/cbfs.h> | Kyösti Mälkki |
2019-12-26 | nb/haswell/minihd: correct subsystem ID | Matt DeVillier |
2019-12-20 | src: Replace min/max() with MIN/MAX() | Elyes HAOUAS |
2019-12-20 | {nb,soc}: Replace min/max() with MIN/MAX() | Elyes HAOUAS |
2019-12-19 | src/northbridge: Remove unused <stdlib.h> | Elyes HAOUAS |
2019-12-14 | bootblock: Provide some common prototypes | Kyösti Mälkki |
2019-12-12 | nb/{haswell,i945,sandybridge}: Drop outdated comment | Elyes HAOUAS |
2019-12-10 | mainboard/(i945,ich7): Remove commented RCBA32(0x341c) code | Elyes HAOUAS |
2019-12-06 | nb/i945: Fix typo | Elyes HAOUAS |
2019-12-02 | src: Move 'static' to the beginning of declaration | Elyes HAOUAS |
2019-12-01 | nb/intel/x4x: Factor out hiding PCI devs in pure fn | Arthur Heymans |
2019-11-26 | nb/intel/sandybridge: Fix mrc.bin path | Arthur Heymans |
2019-11-25 | cpu/intel/slot_1: Move to C_ENVIRONMENT_BOOTBLOCK | Arthur Heymans |
2019-11-25 | Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol | Arthur Heymans |
2019-11-21 | nb/sb/cpu: Drop Intel Rangeley support | Arthur Heymans |
2019-11-18 | nb/intel/sandybridge/mrc: Handle P2P disabling via devicetree | Nico Huber |
2019-11-18 | nb/intel/sandybridge: Set up console in bootblock | Arthur Heymans |
2019-11-18 | nb/intel/sandybridge: Move to C_ENVIRONMENT_BOOTBLOCK | Arthur Heymans |
2019-11-18 | nb/intel/sandybridge: Configure DCACHE_BSP_STACK_SIZE | Arthur Heymans |
2019-11-18 | sb/intel/bd82x6x: Make the pch_enable_lpc hook optional | Arthur Heymans |
2019-11-18 | nb/intel/sandybridge: Make the mainboard_rcba_config hook optional | Arthur Heymans |
2019-11-18 | nb/intel/sandybridge: Make the mainboard_early_init hook optional | Arthur Heymans |
2019-11-15 | nb/intel/x4x: Move to C_ENVIRONMENT_BOOTBLOCK | Arthur Heymans |
2019-11-15 | nb/intel/i945: Initialize console in bootblock | Arthur Heymans |
2019-11-15 | nb/intel/i945: Move to C_ENVIRONMENT_BOOTBLOCK | Arthur Heymans |
2019-11-15 | nb/intel/i945: Move boilerplate romstage to a common location | Arthur Heymans |
2019-11-15 | nb/intel/x4x: Move boilerplate romstage to a common location | Arthur Heymans |
2019-11-14 | mb/*/*(ich7/x4x): Use common early southbridge init | Arthur Heymans |
2019-11-14 | sb/intel/i82801jx: Move early sb init to a common place | Arthur Heymans |
2019-11-14 | sb/intel/i82801gx: Add common early code | Arthur Heymans |
2019-11-14 | nb/intel/i440bx: Remove unnecessary __SIMPLE_DEVICE__ | Arthur Heymans |
2019-11-13 | nb/intel/x4x.h: Include stdint.h | Arthur Heymans |
2019-11-13 | sb/intel/i82801gx: Add a function to set up BAR | Arthur Heymans |
2019-11-11 | fsp{rangeley,baytrail,broadwell_de}: Fix dead assignment | Elyes HAOUAS |
2019-11-08 | arch/x86: Drop some __SMM__ guards | Kyösti Mälkki |
2019-11-05 | intel/i440bx: Switch to UDELAY_TSC and TSC_MONOTONIC_TIMER | Kyösti Mälkki |
2019-11-04 | nb/intel: Use defined DEFAULT_RCBA | Elyes HAOUAS |
2019-11-04 | nb/intel/nehalem: Fix 'dead assignment' | Elyes HAOUAS |
2019-11-04 | nb/intel/x4x/x4x.h: Include iomap.h | Arthur Heymans |
2019-11-03 | arch/x86: Use the stage argument to implement cbmem_top | Arthur Heymans |