| Age | Commit message (Expand) | Author |
|---|
| 2013-03-23 | resources: introduce reserved_ram_resource() | Aaron Durbin |
| 2013-03-22 | haswell: use dynamic cbmem | Aaron Durbin |
| 2013-03-22 | coreboot: dynamic cbmem requirement | Aaron Durbin |
| 2013-03-22 | x86: Unify arch/io.h and arch/romcc_io.h | Stefan Reinauer |
| 2013-03-21 | haswell/lynxpoint: Use new PCH/PM helper functions | Duncan Laurie |
| 2013-03-21 | haswell: Drop the device ID check in graphics init path | Duncan Laurie |
| 2013-03-21 | haswell: add multipurpose SMM memory region | Aaron Durbin |
| 2013-03-21 | haswell: use s3_resume field in romstage_handoff | Aaron Durbin |
| 2013-03-21 | haswell: cbmem_get_table_location() implementation | Aaron Durbin |
| 2013-03-20 | haswell: drop memory reservation for sandybridge GPU bug | Duncan Laurie |
| 2013-03-18 | haswell: move call site of save_mrc_data() | Aaron Durbin |
| 2013-03-18 | haswell: remove unused sys_info structure | Aaron Durbin |
| 2013-03-18 | haswell: adjust CAR usage | Aaron Durbin |
| 2013-03-18 | haswell: fix ACPI MCFG table | Aaron Durbin |
| 2013-03-18 | haswell: enable caching before SMM initialization | Aaron Durbin |
| 2013-03-17 | haswell platforms: restructure romstage main | Aaron Durbin |
| 2013-03-17 | haswell: include TSEG region in cacheable memory | Aaron Durbin |
| 2013-03-17 | i945: Replace some two magic values by defined names | Patrick Georgi |
| 2013-03-16 | haswell: don't add a 0-sized memory range resource | Aaron Durbin |
| 2013-03-15 | Google Link: Add remaining code to support native graphics | Ronald G. Minnich |
| 2013-03-15 | haswell: Fix BDSM and BGSM indicies in memory map | Aaron Durbin |
| 2013-03-15 | haswell: reserve default SMRAM space | Aaron Durbin |
| 2013-03-15 | haswell: resource allocation | Aaron Durbin |
| 2013-03-14 | haswell: more ULT/LP support and minor tweaks | Duncan Laurie |
| 2013-03-14 | haswell: Add VGA PCI ID mappings | Aaron Durbin |
| 2013-03-14 | haswell: Add ULT device IDs | Duncan Laurie |
| 2013-03-14 | graysreef: update platform information | Aaron Durbin |
| 2013-03-14 | haswell: remove explicit pcie config accesses | Aaron Durbin |
| 2013-03-14 | haswell: add PCI id support | Aaron Durbin |
| 2013-03-14 | haswell: Remove logic to send dram init done to ME | Aaron Durbin |
| 2013-03-14 | haswell: notes and updates. | Aaron Durbin |
| 2013-03-14 | haswell: align pei_data structure with intel-framework | Aaron Durbin |
| 2013-03-14 | haswell: use #defines for constants in udelay.c | Aaron Durbin |
| 2013-03-14 | haswell: Add LPT LP device IDs to platform report | Duncan Laurie |
| 2013-03-14 | haswell: Update GPU power management setup | Duncan Laurie |
| 2013-03-14 | haswell: always use MMIO PCI config accesses | Aaron Durbin |
| 2013-03-14 | haswell: Add initial support for Haswell platforms | Aaron Durbin |
| 2013-03-09 | Add Intel Panther Point USB3 initialization | Marc Jones |
| 2013-03-07 | Intel e7505: provide get_top_of_ram | Kyösti Mälkki |
| 2013-03-01 | GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« | Paul Menzel |
| 2013-02-28 | Drop CONFIG_WRITE_HIGH_TABLES | Stefan Reinauer |
| 2013-02-14 | sconfig: rename lapic_cluster -> cpu_cluster | Stefan Reinauer |
| 2013-02-14 | sconfig: rename pci_domain -> domain | Stefan Reinauer |
| 2013-02-11 | spi.h: Rename the spi.h to spi-generic.h | Zheng Bao |
| 2013-02-11 | Intel: Replace MSR 0xcd with MSR_FSB_FREQ | Patrick Georgi |
| 2013-01-30 | Extend CBFS to support arbitrary ROM source media. | Hung-Te Lin |
| 2013-01-14 | Support for Celeron 1007U | Stefan Reinauer |
| 2012-11-28 | Remove assembly coded log2 function | Ronald G. Minnich |
| 2012-11-27 | Drop driver-y from GM45/ICH9/RK9 | Stefan Reinauer |
| 2012-11-27 | Remove AMD special case for LAPIC based udelay() | Patrick Georgi |
| 2012-11-27 | Get rid of drivers class | Patrick Georgi |
| 2012-11-27 | intel/gm45: new northbridge | Patrick Georgi |
| 2012-11-24 | yabel: Use X86_* instead of the more verbose M.x86.REG_* | Patrick Georgi |
| 2012-11-17 | Use new system agent binaries | Stefan Reinauer |
| 2012-11-14 | Sandybridge: Set PEG clock gating | Marc Jones |
| 2012-11-14 | Add PCIe init and NMode flag to PEI data structure | Stefan Reinauer |
| 2012-11-14 | Add ddr3lv_support flag to pei_data structure | Duncan Laurie |
| 2012-11-14 | pei_data.h: Fix comment | Marc Jones |
| 2012-11-14 | Provide MRC with a console printing callback function | Vadim Bendebury |
| 2012-11-12 | Initial IGD OpRegion implementation | Stefan Reinauer |
| 2012-11-12 | Avoid using hardcoded values in MRC cache code | Vadim Bendebury |
| 2012-11-09 | Make coreboot use the offset parameter in cbfstool create | Stefan Reinauer |
| 2012-11-09 | Make register/value lists const | Stefan Reinauer |
| 2012-11-07 | SandyBridge/IvyBridge: Use flash map to find MRC cache | Stefan Reinauer |
| 2012-11-07 | Add missing newline in error message | Stefan Reinauer |
| 2012-11-07 | CMOS: Move MRC seed offset into upper bank | Duncan Laurie |
| 2012-11-02 | Fix some issues with new "reference" toolchain | Stefan Reinauer |
| 2012-10-26 | northbridge/sch: move the \n so it reads a little better | Sebastian Andrzej Siewior |
| 2012-10-26 | northbridge/sch: read the size of main memory from the proper register | Sebastian Andrzej Siewior |
| 2012-10-26 | northbridge/sch: Read the GPU memory from the correct PCI device | Sebastian Andrzej Siewior |
| 2012-10-26 | northbridge/sch: don't overwrite hightables with GPU / TSEG memory | Sebastian Andrzej Siewior |
| 2012-10-07 | Remove chip.h files without config structure | Kyösti Mälkki |
| 2012-09-25 | HAVE_HIGH_TABLES is gone | Patrick Georgi |
| 2012-08-22 | Auto-declare chip_operations | Kyösti Mälkki |
| 2012-08-09 | Sandybridge: Fix integer overrun in romstage udelay() | Stefan Reinauer |
| 2012-08-08 | Cleanup coreboot memory table includes | Kyösti Mälkki |
| 2012-08-07 | Sandy/Ivy Bridge and Cougar/Panther Point: Fix names | Stefan Reinauer |
| 2012-08-01 | Intel and GFXUMA: drop redundant use of lb_add_memory_range() | Kyösti Mälkki |
| 2012-08-01 | Intel Sandybridge and UMA: use mmio_resource() | Kyösti Mälkki |
| 2012-08-01 | Intel Sandybridge: add reserved memory as resources | Kyösti Mälkki |
| 2012-07-30 | sandybridge: reinitialize usbdebug after MRC | Sven Schnelle |
| 2012-07-27 | Intel and GFXUMA: fix MTRR and use uma_resource() | Kyösti Mälkki |
| 2012-07-27 | Intel 82810 and 82830: always room for PCI memory | Kyösti Mälkki |
| 2012-07-27 | Intel i945 and sch: no memory over 4GB | Kyösti Mälkki |
| 2012-07-26 | Refactor driver structs | Patrick Georgi |
| 2012-07-26 | CTDP: Only do TDP down/nominal change from TNP0 | Duncan Laurie |
| 2012-07-26 | ACPI: Add support for runtime config TDP down | Duncan Laurie |
| 2012-07-25 | ELOG: Add support for a monotonic boot counter in CMOS | Duncan Laurie |
| 2012-07-25 | More descriptive error messages in Sandybridge raminit code | Stefan Reinauer |
| 2012-07-24 | ELOG: Fix boot count increment for non-wake case | Duncan Laurie |
| 2012-07-24 | Ivybridge: fix workaround and enable PAIR | Duncan Laurie |
| 2012-07-24 | CPU: Add basic support for Nominal Configurable TDP | Duncan Laurie |
| 2012-07-24 | Rename cache_lbmem() to cache_ramstage() | Stefan Reinauer |
| 2012-07-24 | Make ACPI code detect Sandy/Ivy Bridge dynamically | Stefan Reinauer |
| 2012-07-24 | Drop (empty) sandybridge_late_initialization() | Stefan Reinauer |
| 2012-07-24 | Add support for HM70 and NM70 LPC bridge | Stefan Reinauer |
| 2012-07-24 | Print PCI ID of PCH during boot up | Stefan Reinauer |
| 2012-07-24 | Drop leading spaces from CPU name string | Stefan Reinauer |
| 2012-07-24 | Fix MRC cache update delays | Stefan Reinauer |
| 2012-07-24 | SandyBridge: Add another PCI device ID for northbridge | Walter Murphy |
