summaryrefslogtreecommitdiff
path: root/src/northbridge/intel
AgeCommit message (Expand)Author
2020-03-26nb/intel/sandybridge: Rename raminit_ivy.cAngel Pons
2020-03-26nb/intel/sandybridge: Drop dead codeAngel Pons
2020-03-26nb/intel/sandybridge: Unify the code pathsAngel Pons
2020-03-26nb/intel/sandybridge: Add print for PLL_REF100_CFGAngel Pons
2020-03-26nb/intel/sandybridge: Rewrite get_FRQAngel Pons
2020-03-25nb/intel/sandybridge: Cache FRQ indexAngel Pons
2020-03-25nb/intel/sandybridge: Rewrite table accessorsAngel Pons
2020-03-25drivers/intel/gma/acpi: Add Kconfigs for backlight registersNico Huber
2020-03-25nb/intel/sandybridge: Factor out timing tablesAngel Pons
2020-03-25nb/intel/sandybridge: Use SPDX headersAngel Pons
2020-03-23nb/intel/sandybridge: Use cached CPUIDAngel Pons
2020-03-23nb/intel/sandybridge: Void MRC cache if CPUID differsAngel Pons
2020-03-23nb/intel/sandybridge: Store CPUID in ctrl structAngel Pons
2020-03-23nb/intel/sandybridge: Add warning to saved structsAngel Pons
2020-03-23nb/intel/sandybridge: Remove unnecessary declarationAngel Pons
2020-03-23nb/intel/sandybridge: Do not define tables in a headerAngel Pons
2020-03-23nb/intel/sandybridge: Reflow raminit tablesAngel Pons
2020-03-23acpi: Change Processor ACPI Name (Intel only)Christian Walter
2020-03-23nb/intel/sandybridge: Remove oddball `- 1` in tRFCAngel Pons
2020-03-22nb/intel/sandybridge: Drop spurious register writeAngel Pons
2020-03-20nb/intel/sandybridge: Deduplicate report_memory_configAngel Pons
2020-03-20nb/intel/sandybridge: Always write to PEGCTLAngel Pons
2020-03-19nb/intel/sandybridge: Use loops on DMI register groupsAngel Pons
2020-03-18nb/intel/sandybridge: Tidy up code and commentsAngel Pons
2020-03-17src (minus soc and mainboard): Remove copyright noticesPatrick Georgi
2020-03-16nb/intel/i945/raminit: Simplify if conditionPaul Menzel
2020-03-15nb/intel/pineview: Clean up code and commentsAngel Pons
2020-03-15treewide: Replace uses of "Nehalem"Angel Pons
2020-03-15nb/intel/nehalem: Rename to ironlakeAngel Pons
2020-03-15nb/intel/i945/raminit: Use boolean type for helper variablesPaul Menzel
2020-03-15nb/intel/i945/raminit: Remove space for correct alignmentPaul Menzel
2020-03-15nb/intel/haswell: Tidy up code and commentsAngel Pons
2020-03-11intel/i945: Call fixup_i945_errata() only for mobile versionElyes HAOUAS
2020-03-07src/nb: Use 'print("%s...", __func__)'Elyes HAOUAS
2020-03-06northbridge: Remove unused include <device/pci.h>Elyes HAOUAS
2020-03-06nb/intel/haswell/peg: Add PEG driver stubChris Morgan
2020-03-04nb/intel/nehalem: Use cache.h functionsArthur Heymans
2020-03-02nb/intel/sandybridge: Fix VBOOTPatrick Rudolph
2020-02-24treewide: Capitalize 'CMOS'Elyes HAOUAS
2020-02-24src: capitalize 'RAM'Elyes HAOUAS
2020-02-21nb/intel/snb: Add PCI routing table for PEG root portsJames Ye
2020-02-18nb/intel/sandybridge: Add Xeon E3-1200 (v1) hostbridge PCI IDJonathan A. Kollasch
2020-02-18nb/intel/sandybridge: use list of northbridge device IDsJonathan A. Kollasch
2020-02-17nb/intel/gm45: Fix typo in console messageElyes HAOUAS
2020-02-17nb/intel/nehalem: Remove unused MRC_CACHE_SIZEElyes HAOUAS
2020-02-12nb/intel/sandybridge/acpi: Fix MMCONF size computationPatrick Rudolph
2020-02-12nb/intel/sandybridge/acpi: Update PEG codePatrick Rudolph
2020-02-06nb/intel/haswell: Fix type definition of dev in PCI_FUNC(dev)Chris Morgan
2020-02-01nb/intel/sandybridge: improve indexed register helper macrosFelix Held
2020-01-29nb/intel/i945: Use boot path macrosPaul Menzel
2020-01-27nb/intel/sandybridge/raminit_common.h: add missing stdint.h includeFelix Held
2020-01-27nb/intel/sandybridge: replace NORTHBRIDGE with HOST_BRIDGE defineFelix Held
2020-01-26intel/i440bx: Resolve long standing raminit TODOsKeith Hui
2020-01-26intel/i440bx: Add timestamp to RAM initKeith Hui
2020-01-26intel/i440bx: Use smbus_read_byte() for raminit debugKeith Hui
2020-01-16nb/intel/sandybridge: sort LANEBASE_* defines by their addressFelix Held
2020-01-16nb/intel/sandybridge: add macros for byte lane register offsetsFelix Held
2020-01-16nb/intel/sandybridge: refactor code around lane_base[]Felix Held
2020-01-15nb/intel/sandybridge: refactor lane_registers[]Felix Held
2020-01-15nb/intel/sandybridge: drop LyCx(r, x, y) macroFelix Held
2020-01-15nb/intel/sandybridge: Repurpose HOST_BRIDGE macroAngel Pons
2020-01-14intel/nehalem,ibexpeak: Move enable_smbus() callKyösti Mälkki
2020-01-14intel/sandybridge,bd82x6x: Move enable_smbus() callKyösti Mälkki
2020-01-14intel/{gm45,x4x},i82801{ix|jx}: Move enable_smbus() callKyösti Mälkki
2020-01-14intel/{i945,pineview},i82801gx: Move enable_smbus() callKyösti Mälkki
2020-01-14nb/intel/sandybridge: Drop 'or zero' instancesAngel Pons
2020-01-12intel/e7505: Always enable DIMM compatibility checksKyösti Mälkki
2020-01-12intel/e7505: Remove commented out suspicious codeKyösti Mälkki
2020-01-12intel/e7505,i82801dx: Refactor raminitKyösti Mälkki
2020-01-12aopen/dxplplusu,intel/e7505: Move mainboard_romstage_entry()Kyösti Mälkki
2020-01-12intel/e7505,i82801dx: Remove wrapper spd_read_byte()Kyösti Mälkki
2020-01-12asus/{p2b-x,p3b-f},intel/i440bx: Move mainboard_romstage_entry()Kyösti Mälkki
2020-01-12intel/i440bx,i82371: Remove wrapper spd_read_byte()Kyösti Mälkki
2020-01-12asus/p3b-f,intel/i440bx: Move enable/disable_spd() callKyösti Mälkki
2020-01-11nb/intel/sandybridge: Tidy up raminit codeAngel Pons
2020-01-10nb/intel/{i945,sandybridge}/bootblock.c: Fix typoElyes HAOUAS
2020-01-10nb/intel/sandybridge: Add a bunch of MCHBAR definesAngel Pons
2020-01-09device,sb/intel: Move SMBus host controller prototypesKyösti Mälkki
2020-01-09nb/intel/{i945,x4x,pineview}: Remove wrapper spd_read_byte()Kyösti Mälkki
2020-01-09drivers/pc80/rtc: Separate {get|set}_option() prototypesKyösti Mälkki
2020-01-09nb/intel/sandybridge: Make MCHBAR arithmetics consistentAngel Pons
2020-01-06drivers/pc80/rtc: Swap cmos_write32() parameter orderKyösti Mälkki
2020-01-02src: Remove unneeded 'include <arch/io.h>'Elyes HAOUAS
2020-01-01nb/intel/sandybridge: replace .val_4028 with .io_latencyFelix Held
2020-01-01nb/intel/sandybridge/sandybridge.h: Do cosmetic fixesAngel Pons
2020-01-01nb/intel/sandybridge: Use the MC_BIOS_DATA defineAngel Pons
2020-01-01nb/intel/sandybridge: Make `PM_PDWN_Config` uppercaseAngel Pons
2020-01-01nb/intel/sandybridge: add and use memory thermal configuration registersFelix Held
2020-01-01nb/intel/sandybridge: add and use ME stolen memory and lock bit definesFelix Held
2020-01-01nb/intel/sandybridge: remove unused duplicate PCIEXBAR define X60BARFelix Held
2020-01-01nb/intel/sandybridge: add and use more MCHBAR register definesFelix Held
2020-01-01nb/intel/sandybridge: move MCHBAR register definitions to sandybridge.hFelix Held
2020-01-01nb/intel/sandybridge: use MESEG register names from datasheetFelix Held
2019-12-31src: Remove some romcc workaroundsJacob Garber
2019-12-31northbridge: Add missing include <device/pci_def.h>Elyes HAOUAS
2019-12-29nb/intel/sandybridge: simplify ME lock and memory enable bit writeFelix Held
2019-12-29nb/intel/sandybridge: add and use defines for ME base and mask registersFelix Held
2019-12-29nb/intel/sandybridge: add and use defines for PCI_DEV(0,0,0) registersFelix Held
2019-12-27arch/x86: Remove <arch/cbfs.h>Kyösti Mälkki
2019-12-26nb/haswell/minihd: correct subsystem IDMatt DeVillier
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-22 12:54:36 +0000