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path: root/src/northbridge/intel
AgeCommit message (Expand)Author
2017-05-20nb/intel/sandybridge: Use macros to determine min and max of timAArthur Heymans
2017-05-20nb/intel/x4x/raminit: Remove very long delayArthur Heymans
2017-05-19drivers/spi/spi_flash: Pass in flash structure to fill in probeFurquan Shaikh
2017-05-19nb/intel/sandybridge: Hide additional nb devicesPatrick Rudolph
2017-05-13nb/intel/x4x: Fix uninitialized variable issueNico Huber
2017-05-11nb/intel/gm45: Fix raminit with mixed raw card typesTristan Corrick
2017-05-11nb/intel/gm45: Fix some errors/warnings given by checkpatchTristan Corrick
2017-05-11nb/intel/x4x: Define and use default MMCONF_BASE_ADDRESSArthur Heymans
2017-05-11nb/intel/gm45: Define and use default MMCONF_BASE_ADDRESSArthur Heymans
2017-05-11nb/intel/i945: Define and use a default MMCONF_BASE_ADDRESSArthur Heymans
2017-05-10nb/intel/x4x: Add support for second PEG slotArthur Heymans
2017-05-09nb/x4x: Do not enable IGD when not supportedArthur Heymans
2017-05-09nb/intel/x4x: Don't run NGI if IGD has not been assigned VGA cyclesArthur Heymans
2017-05-09nb/x4x: Add ramstage IGD disable functionArthur Heymans
2017-05-09nb/x4x/nortbridge.c: Compute TSEG resource allocation dynamicallyArthur Heymans
2017-05-08nb/x4x/raminit.c: Remove ME locking codeArthur Heymans
2017-05-05nb/intel/sandybridge/early_init: Use register namePatrick Rudolph
2017-05-05nb/intel/sandybridge/romstage: Use register namePatrick Rudolph
2017-05-04nb/intel/x4x/raminit: Change reset type on incomplete raminit resetArthur Heymans
2017-05-03nb/intel/gm45: Set display backlight according to EDID stringArthur Heymans
2017-05-03nb/intel/gm45/gma.c: Decode EDID before NGI pathArthur Heymans
2017-05-01nb/intel/sandybridge/gma: Set up OpRegion in nb codePatrick Rudolph
2017-05-01nb/intel/nehalem/gma: Set up OpRegion in nb codePatrick Rudolph
2017-05-01nb/intel/fsp_sandybridge/gma: Set up OpRegion in nb codePatrick Rudolph
2017-04-26nb/pineview/raminit: Don't do Jedec init on resume from S3Arthur Heymans
2017-04-25lib: provide clearer devicetree semanticsAaron Durbin
2017-04-24nb/intel/pineview: Select RELOCATABLE_RAMSTAGEArthur Heymans
2017-04-24nb/intel/pineview: Move to early cbmemArthur Heymans
2017-04-24nb/pineview/raminit: Fix raminit failing on hot reset pathArthur Heymans
2017-04-24northbridge/haswell: clean up native graphics init codeMatt DeVillier
2017-04-22nb/intel/pineview/raminit: Fix CONFIG_DEBUG_RAM_SETUP=y not compilingArthur Heymans
2017-04-19console: Add convenient debug level macros for raminitNico Huber
2017-04-19nb/intel/gm45: Hide some output behind DEBUG_RAM_SETUPNico Huber
2017-04-15nb/intel/x4x/Kconfig: Don't fix CBFS_SIZE on i82801gx southbridgeArthur Heymans
2017-04-14nb/intel/i945: Fix PEG port on 945gcArthur Heymans
2017-04-07nb/intel/i945: Move INTEL_EDIDPatrick Rudolph
2017-04-07nb/intel/sandybridge/raminit: Fix odt stretchPatrick Rudolph
2017-04-07nb/intel/sandybridge/raminit: Always run quick_ram_checkPatrick Rudolph
2017-04-07nb/intel/sandybridge/raminit: Reduce log levelPatrick Rudolph
2017-04-07nb/intel/sandybridge/raminit: Fix normalize_trainingPatrick Rudolph
2017-04-04nb/intel/sandybridge/raminit: Add default valuesPatrick Rudolph
2017-04-04nb/intel/sandybridge/raminit: Add debugging outputPatrick Rudolph
2017-04-04nb/intel/sandybridge/raminit: Add 100MHz refclock supportPatrick Rudolph
2017-04-04nb/intel/sandybridge/raminit: Use Ivy Bridge specific valuesPatrick Rudolph
2017-04-03nb/intel: Deduplicate vbt headerPatrick Rudolph
2017-03-28vboot: Select SoC-specific configuration for all Chrome OS boardsJulius Werner
2017-03-27nb/intel/sandybridge: Use DIV_ROUND_UP macro to select timingsArthur Heymans
2017-03-24nb/intel/i945: Fix SPD dumpsPaul Menzel
2017-03-22nb/intel/i945: Fix errors found by checkpatch.plArthur Heymans
2017-03-21nb/x4x: Move checkreset before SPD readingArthur Heymans
2017-03-21nb/intel/x4x: Fix issues found by checkpatch.plArthur Heymans
2017-03-18nb/i945/gma.c: Refactor panel setupArthur Heymans
2017-03-10northbridge/intel/i440bx: Align codePaul Menzel
2017-03-08nb/intel/nehalem/raminit.c: Refine broken commentStefan Tauner
2017-03-02nb/i945: Clean "Programming DLL Timings" functionElyes HAOUAS
2017-03-01nb/intel/i945: Fix sdram_enhanced_addressing_mode for channel1Elyes HAOUAS
2017-02-22intel/i945: Fix up whitespace and indentationPaul Menzel
2017-02-22nehalem/Kconfig: Rename TRAINING_CACHE_SIZE to MRC_CACHE_SIZEArthur Heymans
2017-02-22nb/intel/nehalem: Clean nehalem.hArthur Heymans
2017-02-22nb/i945/raminit.c: Fix dll timings on 945GCElyes HAOUAS
2017-02-20nb/i945/raminit: sdram_set_channel_mode Test if DIMM slot 3 is populatedElyes HAOUAS
2017-02-17nb/intel/x4x: Implement resume from S3 suspendArthur Heymans
2017-02-17nb/intel/x4x: Fix raminit on reset pathArthur Heymans
2017-02-14nb/i945/gma.c: Remove writes to FIFO Watermark registersArthur Heymans
2017-02-12nb/i945/gma.c: Change name and type of mmiobase in functions argumentArthur Heymans
2017-02-04Only show CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM option when implementedArthur Heymans
2017-02-04drivers/intel/gma/vbt: Add Kconfig symbol for SSC refNico Huber
2017-02-04nb/intel/gm45/igd: Hide IGD while disablingPatrick Rudolph
2017-01-25nb/intel/pineview: Make preallocated igd memory a cmos parameterArthur Heymans
2017-01-22nb/x4x/raminit: Fix programming dram timingsArthur Heymans
2017-01-20nb/gm45/gma.c: Fix reported Pixel clockArthur Heymans
2017-01-11nb/i945/raminit.c: Use Makefile.inc instead of '#include rcven.c'Arthur Heymans
2017-01-10nb/intel/945gc: Hardcode the integrated graphic frequenciesArthur Heymans
2017-01-06nb/intel/*/northbridge.c: Remove #include <device/hypertransport.h>Arthur Heymans
2017-01-06sb/ich7: Use common/gpio.h to set up GPIOsArthur Heymans
2016-12-21nb/i945/early_init.c: Add FSB800 and 1067 to Egress Port Virtual ChannelElyes HAOUAS
2016-12-20nb/intel/haswell: Hook up libgfxinitArthur Heymans
2016-12-18intel/fsp_rangeley: Fix use of __SIMPLE_DEVICE__Kyösti Mälkki
2016-12-18intel cache-as-ram: Move DCACHE_RAM_BASEKyösti Mälkki
2016-12-17nb/x4x: Add other Eaglelake IGD PCI DID to listArthur Heymans
2016-12-16nb/intel/sandybridge/raminit: Separate Sandybridge and IvybridgePatrick Rudolph
2016-12-13nb/intel/gm45: Use lapic udelay in SMMMartin Roth
2016-12-11nb/intel/i945: Make pci_mmio_size a devicetree parameterArthur Heymans
2016-12-11ACPI S3: Flip ACPI_HUGE_LOWMEM_BACKUP defaultKyösti Mälkki
2016-12-11intel/nehalem: Use romstage_handoff for S3Kyösti Mälkki
2016-12-11intel i945 gm45 x4x: Switch to RELOCATABLE_RAMSTAGEKyösti Mälkki
2016-12-11intel/i945: Use romstage_handoff for S3Kyösti Mälkki
2016-12-11intel/gm45: Use romstage_handoff for S3Kyösti Mälkki
2016-12-11intel i945 gm45 x4x post-car: Use postcar_frame for MTRR setupKyösti Mälkki
2016-12-11intel i945 gm45 x4x: Apply cbmem_top() alignmentKyösti Mälkki
2016-12-09intel/sandybridge: Use postcar_frame for MTRR setupKyösti Mälkki
2016-12-08buildsystem: Drop explicit (k)config.h includesKyösti Mälkki
2016-12-08nb/intel/sandybridge: Lock PAVPCDennis Wassenberg
2016-12-07MMCONF_SUPPORT: Drop redundant loggingKyösti Mälkki
2016-12-07MMCONF_SUPPORT: Consolidate resource registrationKyösti Mälkki
2016-12-07MMCONF_SUPPORT: Flip default to enabledKyösti Mälkki
2016-12-07PCI ops: MMCONF_SUPPORT_DEFAULT is requiredKyösti Mälkki
2016-12-06CPU: Declare cpu_phys_address_size() for all archKyösti Mälkki
2016-12-06intel PCI ops: Remove explicit PCI MMCONF accessKyösti Mälkki
2016-12-06intel PCI ops: Remove explicit PCI MMCONF accessKyösti Mälkki
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