aboutsummaryrefslogtreecommitdiff
path: root/src/northbridge/intel
AgeCommit message (Expand)Author
2013-05-01boot: remove cbmem_post_handling()Aaron Durbin
2013-04-18Intel i945: ACPI: Add _OSC methodDenis 'GNUtoo' Carikli
2013-04-16Lenovo ThinkPad X60: Add Native VGA init.Denis 'GNUtoo' Carikli
2013-04-03sandybridge: enable ROM cachingAaron Durbin
2013-03-29sandybridge: add option to mark graphics memory write-combining.Aaron Durbin
2013-03-29haswell: add option to mark graphics memory write-combining.Aaron Durbin
2013-03-29x86: add new mtrr implementationAaron Durbin
2013-03-23resources: introduce reserved_ram_resource()Aaron Durbin
2013-03-22haswell: use dynamic cbmemAaron Durbin
2013-03-22coreboot: dynamic cbmem requirementAaron Durbin
2013-03-22x86: Unify arch/io.h and arch/romcc_io.hStefan Reinauer
2013-03-21haswell/lynxpoint: Use new PCH/PM helper functionsDuncan Laurie
2013-03-21haswell: Drop the device ID check in graphics init pathDuncan Laurie
2013-03-21haswell: add multipurpose SMM memory regionAaron Durbin
2013-03-21haswell: use s3_resume field in romstage_handoffAaron Durbin
2013-03-21haswell: cbmem_get_table_location() implementationAaron Durbin
2013-03-20haswell: drop memory reservation for sandybridge GPU bugDuncan Laurie
2013-03-18haswell: move call site of save_mrc_data()Aaron Durbin
2013-03-18haswell: remove unused sys_info structureAaron Durbin
2013-03-18haswell: adjust CAR usageAaron Durbin
2013-03-18haswell: fix ACPI MCFG tableAaron Durbin
2013-03-18haswell: enable caching before SMM initializationAaron Durbin
2013-03-17haswell platforms: restructure romstage mainAaron Durbin
2013-03-17haswell: include TSEG region in cacheable memoryAaron Durbin
2013-03-17i945: Replace some two magic values by defined namesPatrick Georgi
2013-03-16haswell: don't add a 0-sized memory range resourceAaron Durbin
2013-03-15Google Link: Add remaining code to support native graphicsRonald G. Minnich
2013-03-15haswell: Fix BDSM and BGSM indicies in memory mapAaron Durbin
2013-03-15haswell: reserve default SMRAM spaceAaron Durbin
2013-03-15haswell: resource allocationAaron Durbin
2013-03-14haswell: more ULT/LP support and minor tweaksDuncan Laurie
2013-03-14haswell: Add VGA PCI ID mappingsAaron Durbin
2013-03-14haswell: Add ULT device IDsDuncan Laurie
2013-03-14graysreef: update platform informationAaron Durbin
2013-03-14haswell: remove explicit pcie config accessesAaron Durbin
2013-03-14haswell: add PCI id supportAaron Durbin
2013-03-14haswell: Remove logic to send dram init done to MEAaron Durbin
2013-03-14haswell: notes and updates.Aaron Durbin
2013-03-14haswell: align pei_data structure with intel-frameworkAaron Durbin
2013-03-14haswell: use #defines for constants in udelay.cAaron Durbin
2013-03-14haswell: Add LPT LP device IDs to platform reportDuncan Laurie
2013-03-14haswell: Update GPU power management setupDuncan Laurie
2013-03-14haswell: always use MMIO PCI config accessesAaron Durbin
2013-03-14haswell: Add initial support for Haswell platformsAaron Durbin
2013-03-09Add Intel Panther Point USB3 initializationMarc Jones
2013-03-07Intel e7505: provide get_top_of_ramKyösti Mälkki
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
2013-02-28Drop CONFIG_WRITE_HIGH_TABLESStefan Reinauer
2013-02-14sconfig: rename lapic_cluster -> cpu_clusterStefan Reinauer
2013-02-14sconfig: rename pci_domain -> domainStefan Reinauer
2013-02-11spi.h: Rename the spi.h to spi-generic.hZheng Bao
2013-02-11Intel: Replace MSR 0xcd with MSR_FSB_FREQPatrick Georgi
2013-01-30Extend CBFS to support arbitrary ROM source media.Hung-Te Lin
2013-01-14Support for Celeron 1007UStefan Reinauer
2012-11-28Remove assembly coded log2 functionRonald G. Minnich
2012-11-27Drop driver-y from GM45/ICH9/RK9Stefan Reinauer
2012-11-27Remove AMD special case for LAPIC based udelay()Patrick Georgi
2012-11-27Get rid of drivers classPatrick Georgi
2012-11-27intel/gm45: new northbridgePatrick Georgi
2012-11-24yabel: Use X86_* instead of the more verbose M.x86.REG_*Patrick Georgi
2012-11-17Use new system agent binariesStefan Reinauer
2012-11-14Sandybridge: Set PEG clock gatingMarc Jones
2012-11-14Add PCIe init and NMode flag to PEI data structureStefan Reinauer
2012-11-14Add ddr3lv_support flag to pei_data structureDuncan Laurie
2012-11-14pei_data.h: Fix commentMarc Jones
2012-11-14Provide MRC with a console printing callback functionVadim Bendebury
2012-11-12Initial IGD OpRegion implementationStefan Reinauer
2012-11-12Avoid using hardcoded values in MRC cache codeVadim Bendebury
2012-11-09Make coreboot use the offset parameter in cbfstool createStefan Reinauer
2012-11-09Make register/value lists constStefan Reinauer
2012-11-07SandyBridge/IvyBridge: Use flash map to find MRC cacheStefan Reinauer
2012-11-07Add missing newline in error messageStefan Reinauer
2012-11-07CMOS: Move MRC seed offset into upper bankDuncan Laurie
2012-11-02Fix some issues with new "reference" toolchainStefan Reinauer
2012-10-26northbridge/sch: move the \n so it reads a little betterSebastian Andrzej Siewior
2012-10-26northbridge/sch: read the size of main memory from the proper registerSebastian Andrzej Siewior
2012-10-26northbridge/sch: Read the GPU memory from the correct PCI deviceSebastian Andrzej Siewior
2012-10-26northbridge/sch: don't overwrite hightables with GPU / TSEG memorySebastian Andrzej Siewior
2012-10-07Remove chip.h files without config structureKyösti Mälkki
2012-09-25HAVE_HIGH_TABLES is gonePatrick Georgi
2012-08-22Auto-declare chip_operationsKyösti Mälkki
2012-08-09Sandybridge: Fix integer overrun in romstage udelay()Stefan Reinauer
2012-08-08Cleanup coreboot memory table includesKyösti Mälkki
2012-08-07Sandy/Ivy Bridge and Cougar/Panther Point: Fix namesStefan Reinauer
2012-08-01Intel and GFXUMA: drop redundant use of lb_add_memory_range()Kyösti Mälkki
2012-08-01Intel Sandybridge and UMA: use mmio_resource()Kyösti Mälkki
2012-08-01Intel Sandybridge: add reserved memory as resourcesKyösti Mälkki
2012-07-30sandybridge: reinitialize usbdebug after MRCSven Schnelle
2012-07-27Intel and GFXUMA: fix MTRR and use uma_resource()Kyösti Mälkki
2012-07-27Intel 82810 and 82830: always room for PCI memoryKyösti Mälkki
2012-07-27Intel i945 and sch: no memory over 4GBKyösti Mälkki
2012-07-26Refactor driver structsPatrick Georgi
2012-07-26CTDP: Only do TDP down/nominal change from TNP0Duncan Laurie
2012-07-26ACPI: Add support for runtime config TDP downDuncan Laurie
2012-07-25ELOG: Add support for a monotonic boot counter in CMOSDuncan Laurie
2012-07-25More descriptive error messages in Sandybridge raminit codeStefan Reinauer
2012-07-24ELOG: Fix boot count increment for non-wake caseDuncan Laurie
2012-07-24Ivybridge: fix workaround and enable PAIRDuncan Laurie
2012-07-24CPU: Add basic support for Nominal Configurable TDPDuncan Laurie
2012-07-24Rename cache_lbmem() to cache_ramstage()Stefan Reinauer
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-16 11:46:17 +0000