summaryrefslogtreecommitdiff
path: root/src/northbridge/intel/sandybridge
AgeCommit message (Expand)Author
2013-12-23usbdebug: Add option to disable console for romstageKyösti Mälkki
2013-12-01Add DDR refresh config to pei data structure.Shawn Nematbakhsh
2013-10-14Revert "CBMEM: Always have early initialisation"Kyösti Mälkki
2013-09-21CBMEM: Always have early initialisationKyösti Mälkki
2013-09-11CBMEM x86: Unify get_cbmem_toc()Kyösti Mälkki
2013-09-11CBMEM: Unify get_top_of_ram()Kyösti Mälkki
2013-09-11CBMEM northbridges: Remove references to global high_tables_baseKyösti Mälkki
2013-08-29Sandybridge/Ivybridge: Unify and fix Kconfig defaultsStefan Reinauer
2013-08-09intel/sandybridge intel/bd82x6x: remove explicit pcie config accessesKyösti Mälkki
2013-07-31Drop unused EXTERNAL_MRC_BLOBStefan Reinauer
2013-07-10usbdebug: Move ehci_debug_info allocationKyösti Mälkki
2013-07-10Drop some duplicates of PCI-e config functionsKyösti Mälkki
2013-07-10Fix MMCONF_SUPPORT_DEFAULT for ramstageKyösti Mälkki
2013-07-04intel/sandybridge intel/ivybridge: Use MMCONF_SUPPORT_DEFAULTKyösti Mälkki
2013-07-02Intel GM45, 945, Sandy Bridge: Unify `delay.c` and `udelay.c`Paul Menzel
2013-06-28Add support to enable/disable builtin GbE (again)Stefan Reinauer
2013-06-27Revert "Add support to enable/disable builtin GbE"Kyösti Mälkki
2013-06-22intel/sandybridge: Locate CBMEM TOC early in ramstageKyösti Mälkki
2013-06-21Add support to enable/disable builtin GbEStefan Reinauer
2013-06-20sandybridge: Store MRC cache in CBFSPatrick Georgi
2013-06-04Move the MARK_GRAPHICS_MEM_WRCOMB to x86 architectureRonald G. Minnich
2013-05-25Intel GM45, 945, SNB: Move `multiply_to_tsc()` to `tsc.h`Ronald G. Minnich
2013-05-23Intel Sandy Bridge: udelay.c: Change comparison from <= to <Paul Menzel
2013-05-01boot: remove cbmem_post_handling()Aaron Durbin
2013-04-03sandybridge: enable ROM cachingAaron Durbin
2013-03-29sandybridge: add option to mark graphics memory write-combining.Aaron Durbin
2013-03-29x86: add new mtrr implementationAaron Durbin
2013-03-23resources: introduce reserved_ram_resource()Aaron Durbin
2013-03-22x86: Unify arch/io.h and arch/romcc_io.hStefan Reinauer
2013-03-15Google Link: Add remaining code to support native graphicsRonald G. Minnich
2013-03-09Add Intel Panther Point USB3 initializationMarc Jones
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
2013-02-28Drop CONFIG_WRITE_HIGH_TABLESStefan Reinauer
2013-02-14sconfig: rename lapic_cluster -> cpu_clusterStefan Reinauer
2013-02-14sconfig: rename pci_domain -> domainStefan Reinauer
2013-02-11spi.h: Rename the spi.h to spi-generic.hZheng Bao
2013-01-30Extend CBFS to support arbitrary ROM source media.Hung-Te Lin
2013-01-14Support for Celeron 1007UStefan Reinauer
2012-11-28Remove assembly coded log2 functionRonald G. Minnich
2012-11-27Remove AMD special case for LAPIC based udelay()Patrick Georgi
2012-11-27Get rid of drivers classPatrick Georgi
2012-11-17Use new system agent binariesStefan Reinauer
2012-11-14Sandybridge: Set PEG clock gatingMarc Jones
2012-11-14Add PCIe init and NMode flag to PEI data structureStefan Reinauer
2012-11-14Add ddr3lv_support flag to pei_data structureDuncan Laurie
2012-11-14pei_data.h: Fix commentMarc Jones
2012-11-14Provide MRC with a console printing callback functionVadim Bendebury
2012-11-12Initial IGD OpRegion implementationStefan Reinauer
2012-11-12Avoid using hardcoded values in MRC cache codeVadim Bendebury
2012-11-09Make coreboot use the offset parameter in cbfstool createStefan Reinauer
2012-11-09Make register/value lists constStefan Reinauer
2012-11-07SandyBridge/IvyBridge: Use flash map to find MRC cacheStefan Reinauer
2012-11-07Add missing newline in error messageStefan Reinauer
2012-11-07CMOS: Move MRC seed offset into upper bankDuncan Laurie
2012-08-22Auto-declare chip_operationsKyösti Mälkki
2012-08-09Sandybridge: Fix integer overrun in romstage udelay()Stefan Reinauer
2012-08-08Cleanup coreboot memory table includesKyösti Mälkki
2012-08-07Sandy/Ivy Bridge and Cougar/Panther Point: Fix namesStefan Reinauer
2012-08-01Intel and GFXUMA: drop redundant use of lb_add_memory_range()Kyösti Mälkki
2012-08-01Intel Sandybridge and UMA: use mmio_resource()Kyösti Mälkki
2012-08-01Intel Sandybridge: add reserved memory as resourcesKyösti Mälkki
2012-07-30sandybridge: reinitialize usbdebug after MRCSven Schnelle
2012-07-26Refactor driver structsPatrick Georgi
2012-07-26CTDP: Only do TDP down/nominal change from TNP0Duncan Laurie
2012-07-26ACPI: Add support for runtime config TDP downDuncan Laurie
2012-07-25ELOG: Add support for a monotonic boot counter in CMOSDuncan Laurie
2012-07-25More descriptive error messages in Sandybridge raminit codeStefan Reinauer
2012-07-24ELOG: Fix boot count increment for non-wake caseDuncan Laurie
2012-07-24Ivybridge: fix workaround and enable PAIRDuncan Laurie
2012-07-24CPU: Add basic support for Nominal Configurable TDPDuncan Laurie
2012-07-24Make ACPI code detect Sandy/Ivy Bridge dynamicallyStefan Reinauer
2012-07-24Drop (empty) sandybridge_late_initialization()Stefan Reinauer
2012-07-24Add support for HM70 and NM70 LPC bridgeStefan Reinauer
2012-07-24Print PCI ID of PCH during boot upStefan Reinauer
2012-07-24Drop leading spaces from CPU name stringStefan Reinauer
2012-07-24Fix MRC cache update delaysStefan Reinauer
2012-07-24SandyBridge: Add another PCI device ID for northbridgeWalter Murphy
2012-07-24Fixes to enable RC6 on IvyBridgeDuncan Laurie
2012-07-16Define global uma_memory variablesKyösti Mälkki
2012-05-29Sandybridge: Remove remnants of FDT support from MRC cache codeStefan Reinauer
2012-05-29Sandybridge: Fix MRC cache calculationStefan Reinauer
2012-05-11Hook up MRC cache updateStefan Reinauer
2012-05-11Rework Sandybridge MRC cache handlingStefan Reinauer
2012-05-08Clean up #ifsPatrick Georgi
2012-05-03Add missing newline to printk in Sandybridge init codeStefan Reinauer
2012-05-02Strip quotes from Sandybridge MRC blobStefan Reinauer
2012-05-02Sandybridge: Display platform information earlyVadim Bendebury
2012-05-01Update Ivybridge GT power meter tablesDuncan Laurie
2012-05-01Update ivybridge graphics initializationDuncan Laurie
2012-05-01Only send ME Dram Init Done message on SandybridgeDuncan Laurie
2012-05-01Modify DMI init for IvyBridgeVincent Palatin
2012-05-01Fix Sandybridge/Ivybridge mainboards according to code reviewStefan Reinauer
2012-04-30Sandybridge: Temporarily disable MRC cache finding codeStefan Reinauer
2012-04-28Reverse Vendor ID & Device ID for map_oprom_vendev()Martin Roth
2012-04-27SMM: Add udelay on Sandybridge systemsStefan Reinauer
2012-04-05Add support for Intel Sandybridge CPU (northbridge part)Stefan Reinauer
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-05 17:17:39 +0000