coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2020-03-25	nb/intel/sandybridge: Factor out timing tables	Angel Pons
	The timing tables for Sandy Bridge are a subset of Ivy Bridge's tables. Move the latter to a common place, and use it for both generations. Tested on Asus P8Z77-V LX2 with an i7-2600 and an i5-3330, both work. Change-Id: Id14227febf4eebb8a2b4d2d4f37759d0f42648c6 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39735 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-03-23	nb/intel/sandybridge: Do not define tables in a header	Angel Pons
	Header files are supposed to not make allocations from .bss. Builds fail if said file is included multiple times. To prevent this from happening, move the definitions to a C file. Also, rename raminit_patterns to raminit_tables. This is because more tables that are not patterns will be added here in subsequent changes. Tested on Asus P8Z77-V LX2, still boots fine. Change-Id: If8e3a285ecdc4df9e978ae156be915ced6e1750b Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39754 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>