| Age | Commit message (Expand) | Author |
|---|---|---|
| 2014-05-06 | northbridge/intel/sandybridge/pei_data.h: Fix typo in hig*h*est in comment | Paul Menzel |
| 2013-12-01 | Add DDR refresh config to pei data structure. | Shawn Nematbakhsh |
| 2013-06-28 | Add support to enable/disable builtin GbE (again) | Stefan Reinauer |
| 2013-06-27 | Revert "Add support to enable/disable builtin GbE" | Kyösti Mälkki |
| 2013-06-21 | Add support to enable/disable builtin GbE | Stefan Reinauer |
| 2013-03-09 | Add Intel Panther Point USB3 initialization | Marc Jones |
| 2012-11-14 | Add PCIe init and NMode flag to PEI data structure | Stefan Reinauer |
| 2012-11-14 | Add ddr3lv_support flag to pei_data structure | Duncan Laurie |
| 2012-11-14 | pei_data.h: Fix comment | Marc Jones |
| 2012-11-14 | Provide MRC with a console printing callback function | Vadim Bendebury |
| 2012-04-05 | Add support for Intel Sandybridge CPU (northbridge part) | Stefan Reinauer |
 |
index : coreboot.git | |
| my copy of coreboot | gitea |
| aboutsummaryrefslogtreecommitdiff |