aboutsummaryrefslogtreecommitdiff
path: root/src/northbridge/intel/sandybridge/northbridge.c
AgeCommit message (Expand)Author
2014-06-18northbridge/intel: Drop use of set_top_of_ram()Kyösti Mälkki
2014-05-19intel: Remove GFXUMA and related global variablesKyösti Mälkki
2014-05-14intel: Drop obsolete comments on MTRR usageKyösti Mälkki
2014-02-25Remove CACHE_ROM.Vladimir Serbinenko
2014-01-15CBMEM intel: Define get_top_of_ram() once per chipsetKyösti Mälkki
2013-09-11CBMEM x86: Unify get_cbmem_toc()Kyösti Mälkki
2013-09-11CBMEM: Unify get_top_of_ram()Kyösti Mälkki
2013-09-11CBMEM northbridges: Remove references to global high_tables_baseKyösti Mälkki
2013-07-10Fix MMCONF_SUPPORT_DEFAULT for ramstageKyösti Mälkki
2013-06-22intel/sandybridge: Locate CBMEM TOC early in ramstageKyösti Mälkki
2013-05-01boot: remove cbmem_post_handling()Aaron Durbin
2013-04-03sandybridge: enable ROM cachingAaron Durbin
2013-03-23resources: introduce reserved_ram_resource()Aaron Durbin
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
2013-02-28Drop CONFIG_WRITE_HIGH_TABLESStefan Reinauer
2013-02-14sconfig: rename lapic_cluster -> cpu_clusterStefan Reinauer
2013-02-14sconfig: rename pci_domain -> domainStefan Reinauer
2012-11-28Remove assembly coded log2 functionRonald G. Minnich
2012-08-08Cleanup coreboot memory table includesKyösti Mälkki
2012-08-07Sandy/Ivy Bridge and Cougar/Panther Point: Fix namesStefan Reinauer
2012-08-01Intel and GFXUMA: drop redundant use of lb_add_memory_range()Kyösti Mälkki
2012-08-01Intel Sandybridge and UMA: use mmio_resource()Kyösti Mälkki
2012-08-01Intel Sandybridge: add reserved memory as resourcesKyösti Mälkki
2012-07-24Ivybridge: fix workaround and enable PAIRDuncan Laurie
2012-07-24CPU: Add basic support for Nominal Configurable TDPDuncan Laurie
2012-07-24SandyBridge: Add another PCI device ID for northbridgeWalter Murphy
2012-07-16Define global uma_memory variablesKyösti Mälkki
2012-05-11Hook up MRC cache updateStefan Reinauer
2012-05-11Rework Sandybridge MRC cache handlingStefan Reinauer
2012-05-08Clean up #ifsPatrick Georgi
2012-05-01Modify DMI init for IvyBridgeVincent Palatin
2012-04-05Add support for Intel Sandybridge CPU (northbridge part)Stefan Reinauer
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-19 19:15:24 +0000