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path: root/src/northbridge/intel/pineview
AgeCommit message (Expand)Author
2018-12-03nb/intel/pineview: Use common code for SMM in TSEGArthur Heymans
2018-10-24nb/intel/*: Use 2M TSEG instead of 8M on pre-arrandale hardwareArthur Heymans
2018-10-24nb/intel/*: Account for cbmem_top alignmentArthur Heymans
2018-10-23src: Remove unneeded whitespaceElyes HAOUAS
2018-10-08nb/intel/{gm45,i945,pineview}: Use macro instead of GGC addressElyes HAOUAS
2018-09-25northbridge: Use 'unsigned int' to bare use of 'unsigned'Elyes HAOUAS
2018-08-22nb/intel/*/gma.c: Skip NGI when VGA decode is not enabledArthur Heymans
2018-08-21nb/intel/pineview: Use a common MMCONF_BASE_ADDRESSArthur Heymans
2018-08-21nb/intel/pineview: Use the correct address for the RCVEN strobeArthur Heymans
2018-08-21nb/intel/pineview: Use i2c block read to fetch SPDArthur Heymans
2018-08-10src: Fix typoElyes HAOUAS
2018-08-09src/northbridge: Fix typoElyes HAOUAS
2018-08-01nb/intel/pineview: Don't use PCI operations on the pci_domain deviceArthur Heymans
2018-07-09src/northbridge: Use "foo *bar" instead of "foo* bar"Elyes HAOUAS
2018-06-29sb/intel/i82801{g,j}x: Automatically generate ACPI PIRQ tablesArthur Heymans
2018-06-07nb/intel/pineview: Enable and allocate 8M for TSEGArthur Heymans
2018-06-06arch/x86: Make RELOCATABLE_RAMSTAGE the defaultKyösti Mälkki
2018-06-05nb/intel/pineview: Switch to POSTCAR_STAGEArthur Heymans
2018-06-04nb/intel: Use postcar_frame_add_romcache()Nico Huber
2018-06-04northbridge/intel: Remove unneeded includesElyes HAOUAS
2018-05-31{cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriateNico Huber
2018-05-29src/northbridge: Add and update license headersMartin Roth
2018-05-08{mb,nb,soc}: Remove references to pci_bus_default_ops()Nico Huber
2018-04-30nb/intel/pineview: Get rid of device_tElyes HAOUAS
2017-10-22nb/intel/pineview: Port ACPI opregion to pineviewPatrick Rudolph
2017-09-02nb/intel/pineview: Enable dram remappingArthur Heymans
2017-08-27nb/intel/pineview: Fix typo in DRAM timing computationArthur Heymans
2017-07-21nb/intel/pineview/raminit: Refactor timings selectionArthur Heymans
2017-06-28cpu/intel/pineview: Include speedstepArthur Heymans
2017-06-27nb/intel: add IS_ENABLED() around Kconfig symbol referencesMartin Roth
2017-06-19nb/intel/pineview/raminit: Remove very long delaysArthur Heymans
2017-06-13nb/intel/pineview/raminit.c: Use static const for lookup tablesArthur Heymans
2017-06-08device/Kconfig: Put gfx init methods into a `choice`Nico Huber
2017-06-02Kconfig: Rework MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFGNico Huber
2017-04-26nb/pineview/raminit: Don't do Jedec init on resume from S3Arthur Heymans
2017-04-24nb/intel/pineview: Select RELOCATABLE_RAMSTAGEArthur Heymans
2017-04-24nb/intel/pineview: Move to early cbmemArthur Heymans
2017-04-24nb/pineview/raminit: Fix raminit failing on hot reset pathArthur Heymans
2017-04-22nb/intel/pineview/raminit: Fix CONFIG_DEBUG_RAM_SETUP=y not compilingArthur Heymans
2017-01-25nb/intel/pineview: Make preallocated igd memory a cmos parameterArthur Heymans
2017-01-06nb/intel/*/northbridge.c: Remove #include <device/hypertransport.h>Arthur Heymans
2016-12-08buildsystem: Drop explicit (k)config.h includesKyösti Mälkki
2016-12-07MMCONF_SUPPORT: Flip default to enabledKyösti Mälkki
2016-11-22Remove explicit select MMCONF_SUPPORTKyösti Mälkki
2016-11-21nb/intel: Fix some spelling mistakes in comments and stringsMartin Roth
2016-09-27nb/intel/*/gma.c: remove spaces at the fake vbt generationArthur Heymans
2016-09-12src/northbridge: Improve code formattingElyes HAOUAS
2016-08-31northbridge/intel: Add required space before opening parenthesis '('Elyes HAOUAS
2016-07-15intel/pineview: Do not use scratchpad register for ACPI S3Kyösti Mälkki
2016-07-14nb/intel/pineview/northbridge.c: Remove legacy_hole_size_k declarationJonathan Neuschäfer
2016-05-08intel/pineview: Don't try to store 34 bits in 32Stefan Reinauer
2016-02-28northbridge/intel: add missing #include guardsIru Cai
2016-01-28nb/intel/pineview: Native VGA init (CRT)Damien Zammit
2016-01-26nb/intel/pineview: Increase MMCONF decoding to 256 bussesDamien Zammit
2016-01-20nb/intel/pineview: Use macro names for memory base registersDamien Zammit
2016-01-18nb/intel/pineview: Fix decode_pciebar()Damien Zammit
2015-12-02northbridge/intel/pineview: Add native raminitDamien Zammit
2015-12-02northbridge/intel/pineview: Add remaining boilerplate code for northbridgeDamien Zammit
2015-11-24northbridge/intel/pineview: Add minimal Pineview northbridgeDamien Zammit
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