coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2017-04-24	nb/intel/pineview: Move to early cbmem	Arthur Heymans
	TESTED on D510MO. Change-Id: I05aa40df0d2a090fcf734416669e9e1bbff094e4 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19414 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2017-01-06	nb/intel/*/northbridge.c: Remove #include <device/hypertransport.h>	Arthur Heymans
	Nothing from that header is used or even declared since CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not selected on Intel hardware. Change-Id: I9101eb6ffa6664a2ab45bc0b247279c916266537 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/18044 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2016-07-15	intel/pineview: Do not use scratchpad register for ACPI S3	Kyösti Mälkki
	If S3 support was implemented for this platform later on, use romstage handoff structure instead. Change-Id: Ib0cf3ad41753baee26354c5ed19294048e7fb533 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/15715 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Damien Zammit <damien@zamaudio.com>
2016-07-14	nb/intel/pineview/northbridge.c: Remove legacy_hole_size_k declaration	Jonathan Neuschäfer
	Change-Id: I7c3973ff325f11a86728e8660c70839776981aa5 Reported-by: GCC 6.1.0 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/15554 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2016-01-28	nb/intel/pineview: Native VGA init (CRT)	Damien Zammit
	VGA grub console works but display wobbles left/right drm/i915 driver reports one error: - [drm:i915_irq_handler] ERROR pipe A underrun - Monitor does not display 1920x1080 after modeset - Other resolutions look out of sync Cause: suspect single bug in raminit (chipset init) Change-Id: I2dcf59f8f30efe98f17a937bf98f5ab7221fc3ac Signed-off-by: Damien Zammit <damien@zamaudio.com> Reviewed-on: https://review.coreboot.org/12921 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-01-20	nb/intel/pineview: Use macro names for memory base registers	Damien Zammit
	Change-Id: I0b79ddcf9248c6a6964dd60e30a6ea18e27bc186 Signed-off-by: Damien Zammit <damien@zamaudio.com> Reviewed-on: https://review.coreboot.org/13032 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-12-02	northbridge/intel/pineview: Add remaining boilerplate code for northbridge	Damien Zammit
	This patch does not include native raminit Change-Id: I3fb8146ef7fe2ad27c167ecd2fb0fd629f051cc1 Signed-off-by: Damien Zammit <damien@zamaudio.com> Reviewed-on: https://review.coreboot.org/12430 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)