aboutsummaryrefslogtreecommitdiff
path: root/src/northbridge/intel/nehalem
AgeCommit message (Expand)Author
2019-01-13{mb,nb,soc/fsp_baytrail}: Get rid of dump_mem()Elyes HAOUAS
2019-01-06device: Use pcidev_path_on_root()Kyösti Mälkki
2019-01-06device: Use pcidev_on_root()Kyösti Mälkki
2018-12-19northbridge: Remove useless include <device/pci_ids.h>Elyes HAOUAS
2018-11-29src: Remove duplicated round up functionElyes HAOUAS
2018-11-16src: Remove unneeded include <cbmem.h>Elyes HAOUAS
2018-11-16src: Remove unneeded include <cbfs.h>Elyes HAOUAS
2018-11-12src: Remove unneeded include "{arch,cpu}/cpu.h"Elyes HAOUAS
2018-10-23src: Remove unneeded whitespaceElyes HAOUAS
2018-10-19nb/intel/nehalem: Remove unneeded whitespaceElyes HAOUAS
2018-10-11src: Move common IA-32 MSRs to <cpu/x86/msr.h>Elyes HAOUAS
2018-10-08Move compiler.h to commonlibNico Huber
2018-09-28src/*: normalize Google copyright headersPatrick Georgi
2018-09-25northbridge: Use 'unsigned int' to bare use of 'unsigned'Elyes HAOUAS
2018-08-04nehalem/raminit: remove read_mchbar functionsFelix Held
2018-08-04nehalem/raminit: clean up code and remove write_mchbar functionsFelix Held
2018-08-04northbridge/nehalem: add MCHBAR8/16 AND_OR macrosFelix Held
2018-08-04nehalem/raminit: clean up code and use MCHBAR macrosFelix Held
2018-08-04nehalem/raminit: remove REAL define and most dead codeFelix Held
2018-07-30nb/intel/gm45: Use common code for SMM in TSEGArthur Heymans
2018-07-30northbridge/nehalem: add MCHBAR AND/OR/AND_OR macrosFelix Held
2018-07-30northbridge/nehalem: clean up header fileFelix Held
2018-07-26nb/intel/nehalem: Remove the C native graphic initArthur Heymans
2018-07-09src/northbridge: Use "foo *bar" instead of "foo* bar"Elyes HAOUAS
2018-07-02src/nb: Fix non-local header treated as localElyes HAOUAS
2018-06-21Revert "sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location"Arthur Heymans
2018-06-17nb/intel/nehalem: Fix DEVEN definesPatrick Rudolph
2018-06-06arch/x86: Make RELOCATABLE_RAMSTAGE the defaultKyösti Mälkki
2018-06-05cpu/intel/model_2065x: Switch to POSTCAR_STAGEArthur Heymans
2018-06-04nb/intel: Use postcar_frame_add_romcache()Nico Huber
2018-06-04northbridge/intel: Remove unneeded includesElyes HAOUAS
2018-05-31{cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriateNico Huber
2018-05-29src/northbridge: Add and update license headersMartin Roth
2018-05-21nb/intel/nehalem: Fix smashed stack in romstageMatthias Gazzari
2018-05-18nb/intel/nehalem: Use the common mrc cache driverArthur Heymans
2018-05-17nb/intel/nehalem: Add ACPI pathPatrick Rudolph
2018-05-08{mb,nb,soc}: Remove references to pci_bus_default_ops()Nico Huber
2018-05-01Fix freeze during chipset lockdown on NehalemMatthias Gazzari
2018-04-30nb/intel/nehalem: Get rid of device_tElyes HAOUAS
2018-04-20pci: Move inline PCI functions to pci_ops.hPatrick Rudolph
2018-04-09intel/nehalem post-car: Use postcar_frame for MTRR setupKyösti Mälkki
2018-02-27sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common locationArthur Heymans
2018-01-31nb/intel/*.h: Remove left-over register definitionsPatrick Rudolph
2017-12-20intel/gma: fix RPNFREQ_VAL bitmaskFelix Held
2017-12-19nb/intel/nehalem/gma: Drop stale pre-pocessor guardsNico Huber
2017-10-283rdparty/lib{hwbase,gfxinit}: Update to latest masterNico Huber
2017-10-28drivers/intel/gma: Put gma_gfxinit() into its own headerNico Huber
2017-08-11drivers/intel/gma/opregion: migrate from nb/commonMatt DeVillier
2017-08-07nb/intel/*/gma.c: Use macros for GMBUS numbersArthur Heymans
2017-07-13Rename __attribute__((packed)) --> __packedStefan Reinauer
2017-07-12nb/intel/nehalem/gma: Set ASLS on S3 resumePatrick Rudolph
2017-07-12drv/intel/gma/opregion: Add interface for GNVS ASLB handlingPatrick Rudolph
2017-06-27nb/intel: add IS_ENABLED() around Kconfig symbol referencesMartin Roth
2017-06-15nb/intel/nehalem/gma: Use common init_igd_opregion methodPatrick Rudolph
2017-06-08device/Kconfig: Put gfx init methods into a `choice`Nico Huber
2017-06-04Kconfig: Add choice of framebuffer modeNico Huber
2017-06-02Kconfig: Introduce HAVE_(VBE_)LINEAR_FRAMEBUFFERNico Huber
2017-06-02Kconfig: Rework MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFGNico Huber
2017-05-01nb/intel/nehalem/gma: Set up OpRegion in nb codePatrick Rudolph
2017-04-03nb/intel: Deduplicate vbt headerPatrick Rudolph
2017-03-08nb/intel/nehalem/raminit.c: Refine broken commentStefan Tauner
2017-02-22nehalem/Kconfig: Rename TRAINING_CACHE_SIZE to MRC_CACHE_SIZEArthur Heymans
2017-02-22nb/intel/nehalem: Clean nehalem.hArthur Heymans
2017-01-06nb/intel/*/northbridge.c: Remove #include <device/hypertransport.h>Arthur Heymans
2016-12-18intel cache-as-ram: Move DCACHE_RAM_BASEKyösti Mälkki
2016-12-11ACPI S3: Flip ACPI_HUGE_LOWMEM_BACKUP defaultKyösti Mälkki
2016-12-11intel/nehalem: Use romstage_handoff for S3Kyösti Mälkki
2016-12-07MMCONF_SUPPORT: Consolidate resource registrationKyösti Mälkki
2016-12-07MMCONF_SUPPORT: Flip default to enabledKyösti Mälkki
2016-12-06intel PCI ops: Remove explicit PCI MMCONF accessKyösti Mälkki
2016-12-06intel PCI ops: Remove explicit PCI MMCONF accessKyösti Mälkki
2016-11-29nb/intel/nehalem,sandybridge: Hook up libgfxinitNico Huber
2016-11-22Remove explicit select MMCONF_SUPPORTKyösti Mälkki
2016-11-21nb/intel: Fix some spelling mistakes in comments and stringsMartin Roth
2016-11-11intel post-car: Separate files for setup_stack_and_mtrrs()Kyösti Mälkki
2016-10-11nb/intel/*/graphic_init: use sizeof instead of hardcoding edid sizeArthur Heymans
2016-10-11cpu/intel/smm: Use CONFIG_SMM_TSEG_SIZENico Huber
2016-10-10northbridge/intel/nehalem: Remove commented codeElyes HAOUAS
2016-10-04src/northbridge: Remove unnecessary whitespaceElyes HAOUAS
2016-10-04src/northbridge: Remove whitespace after sizeofElyes HAOUAS
2016-09-15northbridge/intel/nehalem/gma.c: Improve code formattingElyes HAOUAS
2016-09-13northbridge/intel/nehalem: transition away from device_tAntonello Dettori
2016-06-12nb/intel/raminit (native): Read PCI mmio size from devicetreePatrick Rudolph
2016-06-12nb/intel: Factor out common MRC codePatrick Rudolph
2016-03-11northbridge/intel: move mrccache.c of sandybridge + haswell to commonAlexander Couzens
2016-03-11northbridge/intel: move mrc_cache definition into a common headerAlexander Couzens
2016-02-28northbridge/intel: add missing #include guardsIru Cai
2016-02-10Kconfig: Move defaults for CBFS_SIZEMartin Roth
2015-12-16northbridge/intel ACPI: Remove unused Local methodMartin Roth
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-23Intel: Move MCRS ResourceTemplate outside of _CRS methodMartin Roth
2015-10-15cpu/mtrr.h: Fix macro names for MTRR registersAlexandru Gagniuc
2015-10-12gma: Consolidate Intel IGD ACPI code some moreNico Huber
2015-10-11Kill lvds_num_lanesVladimir Serbinenko
2015-10-11Derive lvds_dual_channel from EDID timings.Vladimir Serbinenko
2015-10-04northbridge/intel/nehalem: Fix native VGA initNicolas Reinecke
2015-09-07intel: Do not hardcode the position of mrc.cacheAlexandru Gagniuc
2015-07-13x86: flatten hierarchyStefan Reinauer
2015-06-23Kconfig: Move CBFS_SIZE into Mainboard menuMartin Roth
2015-06-10model_2065x: Use common i945-ivy TSEG SMM init.Vladimir Serbinenko
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-05 08:56:34 +0000