index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
gitea
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
northbridge
/
intel
/
nehalem
/
ram_calc.c
Age
Commit message (
Expand
)
Author
2019-08-07
intel/nehalem,sandybridge: Move stage_cache support function
Kyösti Mälkki
2019-07-04
arch/x86: Adjust size of postcar stack
Kyösti Mälkki
2019-05-29
nb/intel/nehalem: Call smm_region_start() function
Arthur Heymans
2019-05-27
cpu/intel/model_2065x: Put stage cache in TSEG
Arthur Heymans
2019-03-04
arch/io.h: Drop unnecessary include
Kyösti Mälkki
2019-03-01
device/pci: Fix PCI accessor headers
Kyösti Mälkki
2018-09-28
src/*: normalize Google copyright headers
Patrick Georgi
2018-06-05
cpu/intel/model_2065x: Switch to POSTCAR_STAGE
Arthur Heymans
2018-06-04
nb/intel: Use postcar_frame_add_romcache()
Nico Huber
2018-05-31
{cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriate
Nico Huber
2018-04-09
intel/nehalem post-car: Use postcar_frame for MTRR setup
Kyösti Mälkki
2016-11-11
intel post-car: Separate files for setup_stack_and_mtrrs()
Kyösti Mälkki
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-01-27
CBMEM: Do not use get_top_of_ram() with DYNAMIC_CBMEM
Kyösti Mälkki
2014-06-18
intel/nehalem: Add get_top_top_ram() in ramstage
Kyösti Mälkki