| Age | Commit message (Expand) | Author |
|---|---|---|
| 2016-03-11 | northbridge/intel: move mrccache.c of sandybridge + haswell to common | Alexander Couzens |
| 2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
| 2015-09-07 | intel: Do not hardcode the position of mrc.cache | Alexandru Gagniuc |
| 2015-07-13 | x86: flatten hierarchy | Stefan Reinauer |
| 2015-06-10 | model_2065x: Use common i945-ivy TSEG SMM init. | Vladimir Serbinenko |
| 2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
| 2015-04-29 | kbuild: automatically include northbridges | Stefan Reinauer |
| 2015-03-30 | Update hex values to CBFS binary name types in Makefiles | Martin Roth |
| 2014-11-20 | Replace includes of build.h with version.h | Kyösti Mälkki |
| 2014-10-16 | ACPI: Remove CONFIG_GENERATE_ACPI_TABLES | Vladimir Serbinenko |
| 2014-06-18 | intel/nehalem: Add get_top_top_ram() in ramstage | Kyösti Mälkki |
| 2014-01-23 | nehalem: Move mrc.cache to 0xfffe0000. | Vladimir Serbinenko |
| 2013-11-25 | Support for nehalem northbridge | Vladimir Serbinenko |
 |
index : coreboot.git | |
| my copy of coreboot | gitea |
| aboutsummaryrefslogtreecommitdiff |