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src
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northbridge
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intel
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ironlake
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early_init.c
Age
Commit message (
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Author
2021-02-10
nb/intel/ironlake: Use common {DMI,EP,MCH}BAR accessors
Angel Pons
2020-12-07
nb/intel/ironlake: Drop casts from DEFAULT_{MCHBAR,DMIBAR}
Angel Pons
2020-08-03
nb/intel/ironlake: Add Generic Non-Core register definitions
Angel Pons
2020-08-03
nb/intel/ironlake: Add Generic Non-Core PCI device definition
Angel Pons
2020-08-03
nb/intel/ironlake: Add definition for SAD PCI device
Angel Pons
2020-08-03
nb/intel/ironlake: Drop `D0F0_` prefix from register names
Angel Pons
2020-07-24
nb/intel/ironlake: Move southbridge code to ibexpeak
Angel Pons
2020-07-02
nb/intel/ironlake: Clean up code style (except raminit)
Angel Pons
2020-07-01
nb/intel/ironlake: Use `pci_update_config32()`
Angel Pons
2020-07-01
nb/intel/ironlake: Simplify BAR handling
Angel Pons
2020-05-11
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-04-05
src/northbridge: Use SPDX for GPL-2.0-only files
Angel Pons
2020-03-17
src (minus soc and mainboard): Remove copyright notices
Patrick Georgi
2020-03-15
nb/intel/nehalem: Rename to ironlake
Angel Pons