coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2013-08-01	Add directive __SIMPLE_DEVICE__	Kyösti Mälkki
2013-07-10	Fix MMCONF_SUPPORT_DEFAULT for ramstage	Kyösti Mälkki
2013-07-04	Move select MMCONF_SUPPORT under northbridge (fix)	Kyösti Mälkki
2013-07-02	Intel GM45, 945, Sandy Bridge: Unify `delay.c` and `udelay.c`	Paul Menzel
2013-05-25	Intel GM45, 945, SNB: Move `multiply_to_tsc()` to `tsc.h`	Ronald G. Minnich
2013-05-22	intel/gm45: Add more debug output to read/write training	Nico Huber
2013-05-22	intel/gm45: Handle overflows during DDR3 write training	Nico Huber
2013-05-22	intel/gm45: Refactor DDR3 write training	Nico Huber
2013-05-22	intel/gm45: Handle overflows during DDR3 read training	Nico Huber
2013-05-22	intel/gm45: Refactor DDR3 read training	Nico Huber
2013-05-22	intel/gm45: Fix interpretation of VT-d disable bit	Nico Huber
2013-03-22	x86: Unify arch/io.h and arch/romcc_io.h	Stefan Reinauer
2013-03-01	GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«	Paul Menzel
2013-02-28	Drop CONFIG_WRITE_HIGH_TABLES	Stefan Reinauer
2013-02-14	sconfig: rename lapic_cluster -> cpu_cluster	Stefan Reinauer
2013-02-14	sconfig: rename pci_domain -> domain	Stefan Reinauer
2013-02-11	Intel: Replace MSR 0xcd with MSR_FSB_FREQ	Patrick Georgi
2012-11-28	Remove assembly coded log2 function	Ronald G. Minnich
2012-11-27	Drop driver-y from GM45/ICH9/RK9	Stefan Reinauer
2012-11-27	intel/gm45: new northbridge	Patrick Georgi