Age | Commit message (Expand) | Author |
2017-05-19 | drivers/spi/spi_flash: Pass in flash structure to fill in probe | Furquan Shaikh |
2017-03-02 | Revert "nb/amd/mct_ddr3: Fix RDIMM training failure on Fam15h" | Daniel Kulesz |
2017-02-25 | nb/amd/amdmct: Remove another currently unused table | Jonathan Neuschäfer |
2017-02-24 | nb/amd/amdmct: Remove two currently unused tables | Jonathan Neuschäfer |
2017-01-19 | nb/amd/ddr3: Make the maximum CDD a signed value | Timothy Pearson |
2017-01-14 | amd/mct: Add default values to highest_rank_count for DDR2 | Timothy Pearson |
2017-01-12 | amd/mct/ddr2: Remove orphaned Tab_TrefT_k variable | Timothy Pearson |
2017-01-11 | amd/mct/ddr3: Fix unintended sign extension warning | Timothy Pearson |
2017-01-11 | amd/mct/ddr3: Avoid using uninitialized register address in ECC setup | Timothy Pearson |
2017-01-11 | amd/mct/ddr3: Free malloced resources in failure branches | Timothy Pearson |
2017-01-11 | amd/mct/ddr3: Rework memory speed to clock value conversion logic | Timothy Pearson |
2017-01-11 | amd/mct/ddr3: Correctly program maximum read latency | Timothy Pearson |
2017-01-10 | amd/mct/ddr3: Allow critical delay delta to go negative | Timothy Pearson |
2017-01-10 | amd/mct/ddr3: Correctly configure CsMux45 | Timothy Pearson |
2017-01-10 | amd/mct/ddr3: Wait for northbridge P-state transitions | Timothy Pearson |
2017-01-10 | amd/mct/ddr3: Fix incorrect DQ mask calculation | Timothy Pearson |
2017-01-10 | amd/mct/ddr2|ddr3: Refactor persistent members of DCTStatStruc | Timothy Pearson |
2017-01-04 | amdfam10: Perform major include ".c" cleanup | Damien Zammit |
2016-11-22 | spi: Clean up SPI flash driver interface | Furquan Shaikh |
2016-11-09 | nb/amd/amdmct/mct: Remove commented code | Elyes HAOUAS |
2016-10-09 | northbridge/amd/amdmct/mct_ddr3: Remove commented code | Elyes HAOUAS |
2016-10-04 | src/northbridge: Remove unnecessary whitespace | Elyes HAOUAS |
2016-09-21 | northbridge/amd/amdmct: Improve code formatting | Elyes HAOUAS |
2016-09-12 | src/northbridge: Improve code formatting | Elyes HAOUAS |
2016-08-31 | northbridge/amd: Add required space before opening parenthesis '(' | Elyes HAOUAS |
2016-08-23 | src/northbridge: Remove unnecessary whitespace before "\n" and "\t" | Elyes HAOUAS |
2016-08-01 | Remove non-ascii & unprintable characters | Martin Roth |
2016-05-09 | nb/amd/mct_ddr3: Report correct DIMM size in SMBIOS structure | Timothy Pearson |
2016-05-09 | nb/amd/mct_ddr3: Add support for non-ECC DIMMs on AMD Family 15h | Timothy Pearson |
2016-05-02 | nb/amd/mct_ddr3: Only initialize ECC bits once | Timothy Pearson |
2016-05-01 | nb/amd/mct_ddr3: Warn if MaxRdLatency training fails on Family 15h | Timothy Pearson |
2016-05-01 | nb/amd/mct_ddr3: Stop receiver enable cycle training after window found | Timothy Pearson |
2016-05-01 | nb/amd/mct_ddr3: Do not constantly reset read data timing registers to 0 | Timothy Pearson |
2016-05-01 | nb/amd/mct_ddr3: Skip nibble training when current DIMM is not x4 | Timothy Pearson |
2016-05-01 | nb/amd/mct_ddr3: Fix x4 DIMM receiver enable training on Fam15h | Timothy Pearson |
2016-04-28 | nb/amd/mct_ddr3: Restart system on training failure instead of using die() | Timothy Pearson |
2016-04-26 | nb/amd/mct_ddr3: Report correct DIMM in MRS setup routines | Timothy Pearson |
2016-04-26 | nb/amd/mct_ddr3: Fix a number of minor errors in RDIMM setup | Timothy Pearson |
2016-04-25 | nb/amd/mct_ddr3: Scale lane delays for each DIMM after MEMCLK change | Timothy Pearson |
2016-04-22 | Revert "nb/amd/mct_ddr3: Disable MCE framework during DRAM training" | Timothy Pearson |
2016-04-22 | nb/amd/mct_ddr3: Enhance debugging around MEMCLK frequency change | Timothy Pearson |
2016-04-22 | nb/amd/mct_ddr3: Fix RDIMM training on certain DIMMs | Timothy Pearson |
2016-04-22 | nb/amd/mct_ddr3: Run fence training on each node after memory clock change | Timothy Pearson |
2016-04-11 | and/nb/mct_ddr3: Pack all structures passed to ramstage and set alignment | Timothy Pearson |
2016-04-11 | nb/amd/amdfam10: Write MCT variables to flash after PCI configuration | Timothy Pearson |
2016-04-08 | Revert "nb/amd/mct_ddr3: Enable DIMM parity when RDIMMs installed" | Timothy Pearson |
2016-04-08 | nb/amd/mct_ddr3: Reenable sync flood after ECC init | Timothy Pearson |
2016-04-08 | nb/amd/mct_ddr3: Add MCE reporting logic | Timothy Pearson |
2016-04-08 | nb/amd/mct_ddr3: Cache whether ECC is allowed at the platform level | Timothy Pearson |
2016-04-01 | nb/amd/mct_ddr3: Fix revision mask for DR processors | Timothy Pearson |
2016-03-31 | nb/amd_mct_ddr3: Move DRAM MCE sync flood enable to ramstage | Timothy Pearson |
2016-03-31 | nb/amd/mct_ddr3: Clear early MCEs and report DRAM MCEs | Timothy Pearson |
2016-03-31 | nb/amd/mct_ddr3: Disable MCE framework during DRAM training | Timothy Pearson |
2016-03-30 | nb/amd/mct_ddr3: Enable DIMM parity when RDIMMs installed | Timothy Pearson |
2016-03-30 | northbridge/amd/amdfam10: Add family15h model10h-1fh (Trinity) | Damien Zammit |
2016-03-28 | nb/amd/mct_ddr3: Use standard C function calls in mct_ResetDataStruct_D() | Timothy Pearson |
2016-03-26 | nb/amd/amdmct: Select max_lanes based on ECC presence or absence | Damien Zammit |
2016-03-24 | nb/amd/mct_ddr3: Set the NBP0 read latency from P0 trained values | Timothy Pearson |
2016-03-23 | nb/amd/mct_ddr3: Remove spurious Addl_Index variable in dqsTrainMaxRdLatency_... | Timothy Pearson |
2016-03-21 | nb/amd/amdmct/mct_ddr3: Ensure BlockRxDqsLock does not remain set | Timothy Pearson |
2016-03-13 | nb/amd/mct_ddr3: Use correct initial UI setting during DRAM training | Timothy Pearson |
2016-03-12 | nb/amd/mct_ddr3: Consolidate duplicated code | Timothy Pearson |
2016-03-11 | nb/amd/mct_ddr3: Train correct receiver in TrainDQSRdWrPos_D_Fam15 | Timothy Pearson |
2016-03-11 | nb/amd/mct_ddr3: Consolidate calls to MCT minimum clock setting fetch | Timothy Pearson |
2016-03-11 | nb/amd/mct_ddr3: Require minumum training quality for both read and write | Timothy Pearson |
2016-03-11 | nb/amd/mct_ddr3: Set read DQS delay to 1UI before calculating read latency | Timothy Pearson |
2016-03-11 | nb/amd/mct_ddr3: Properly initialize arrays and add bounds checks | Timothy Pearson |
2016-03-11 | nb/amd/mct_ddr3: Restore previous DQS delay values on failed loop | Timothy Pearson |
2016-02-19 | nb/amd/amdmct: Add socket specific configuration for FM2 | Damien Zammit |
2016-02-05 | nb/amd/mct_ddr3: Fix RDIMM training failure on Fam15h | Timothy Pearson |
2016-02-05 | nb/amd/mct_ddr3: Work around RDIMM training failure | Timothy Pearson |
2016-02-02 | src: Fix various spelling and whitespace issues. | Martin Roth |
2016-02-01 | nb/amd/amdmct/mct_ddr3: Save and restore SkewMemClk for S3 resume | Timothy Pearson |
2016-01-29 | nb/amdmct/mct_ddr3: Enable mainboard voltage set | Timothy Pearson |
2016-01-24 | nb/amd/mct_ddr3: Properly set MR0 WR value | Timothy Pearson |
2016-01-24 | nb/amd/mct_ddr3: Add additional verbose-level debug statements | Timothy Pearson |
2016-01-24 | nb/amd/mct_ddr3: Update drive strength configuration | Timothy Pearson |
2016-01-24 | northbridge/amd/amdmct/mct_ddr3: Enable fast refresh on ETR devices | Timothy Pearson |
2016-01-24 | northbridge/amd/amdmct: Add termination and timing values for C32 sockets | Timothy Pearson |
2016-01-13 | tree: drop last paragraph of GPL copyright header from new files | Martin Roth |
2016-01-07 | Correct some common spelling mistakes | Martin Roth |
2015-12-01 | nb/amd/mct_ddr3: Add Family 15h tristate enable codes | Timothy Pearson |
2015-11-30 | nb/amd/amdmct/mct_ddr3: Use StopOnError to decrease training time | Timothy Pearson |
2015-11-30 | nb/amd/mct_ddr3: Use antiphase to better center DQS window | Timothy Pearson |
2015-11-29 | nb/amd/mct_ddr3: Fix odd rank data corruption | Timothy Pearson |
2015-11-29 | nb/amd/amdmct/mct_ddr3: Fix a minor RDIMM CS select error | Timothy Pearson |
2015-11-29 | nb/amd/amdmct/mct_ddr3: Ensure channel clock skew is properly set | Timothy Pearson |
2015-11-24 | northbridge/amd/amdmct/mct_ddr3: Add CC6 setup information messages | Timothy Pearson |
2015-11-24 | northbridge/amd/amdmct/mct_ddr3: Add DDR3 termination debug output | Timothy Pearson |
2015-11-24 | amd/amdfam10: Control Fam15h cache partitioning via nvram | Timothy Pearson |
2015-11-23 | amd/amdmct/mct_ddr3: Fix poor performance on Family 15h CPUs | Timothy Pearson |
2015-11-22 | amd/amdmct/mct_ddr3: Set prefetch double stride to improve performance | Timothy Pearson |
2015-11-22 | nb/amd/amdmct/mct_ddr3: Force DRAM retraining on every boot | Timothy Pearson |
2015-11-19 | northbridge/amd/amdmct/mct_ddr3: Move K10D configuration into separate file | Timothy Pearson |
2015-11-18 | cpu/amd/fam10h-fam15h: Update Fam15h APIC config and startup sequence | Timothy Pearson |
2015-11-16 | northbridge/amd/mct_ddr3: Add registered and x4 DIMM support to Fam15h | Timothy Pearson |
2015-11-16 | amd/amdmct/mct_ddr3: Partially fix up registered DIMMs on Fam10h | Timothy Pearson |
2015-11-16 | nb/amd/mct_ddr3: Fix RDIMM errors due to undefined number of slots | Timothy Pearson |
2015-11-15 | northbridge/amd/amdmct: Reduce maximum number of DDR3 DIMMs | Timothy Pearson |
2015-11-15 | northbridge/amd/amdmct/mct_ddr3: Fix Family 10h boot failure | Timothy Pearson |