Age | Commit message (Expand) | Author |
2015-11-15 | northbridge/amd/amdmct/mct_ddr3: Set SkewMemClk when both DCTs are in use | Timothy Pearson |
2015-11-15 | northbridge/amd/amdmct/mct_ddr3: Add missing Family 15h RDIMM Rtt values | Timothy Pearson |
2015-11-15 | northbridge/amd/amdmct/mct_ddr3: Fix null pointer access and related hangs | Timothy Pearson |
2015-11-15 | northbridge/amd/amdmct/mct_ddr3: Work around strange phy training issue | Timothy Pearson |
2015-11-15 | northbridge/amd/amdmct/mct_ddr3: Attempt to recover from phy training errors | Timothy Pearson |
2015-11-15 | amd/amdmct/mct_ddr3: Add Family 15h RDIMM timing and ODT values | Timothy Pearson |
2015-11-15 | cpu/amd: Fix AMD Family 15h ECC initialization reliability issues | Timothy Pearson |
2015-11-15 | northbridge/amd/amdmct/mct_ddr3: Fix lockups and wasted time during ECC init | Timothy Pearson |
2015-11-14 | northbridge/amd/amdmct/mct_ddr3: Add additional debug trace statements | Timothy Pearson |
2015-11-14 | northbridge/amd/amdfam10: Properly indicate node and channel in SMBIOS tables | Timothy Pearson |
2015-11-12 | northbridge/amd/amdmct/mct_ddr3: Update prefetcher configuration | Timothy Pearson |
2015-11-12 | northbridge/amd/amdmct: Clear memory before enabling ECC | Timothy Pearson |
2015-11-12 | src/northbridge/amd/amdmct: Add option to override bad SPD checksum | Timothy Pearson |
2015-11-12 | northbridge/amd/amdmct: Verify MCT NVRAM options before skipping training | Timothy Pearson |
2015-11-11 | northbridge/amd/amdmct: Fix crash on startup due to NULL pointer access | Timothy Pearson |
2015-11-11 | northbridge/amd/amdmct: Fix hang on boot due to invalid array access | Timothy Pearson |
2015-11-11 | northbridge/amd/amdmct: Skip DCT config write to Flash if unchanged | Timothy Pearson |
2015-11-11 | cpu/amd: Add CC6 support | Timothy Pearson |
2015-11-11 | mainboard/asus/kgpe-d16: Enable CC6 | Timothy Pearson |
2015-11-11 | northbridge/amd/amdfam10: Enable CC6 DRAM save area setup | Timothy Pearson |
2015-11-11 | amd/amdmct/mct_ddr3: Use training values from previous boot if possible | Timothy Pearson |
2015-11-11 | amd/amdmct/mct_ddr3: Improve SPD DIMM detect reliability | Timothy Pearson |
2015-11-10 | northbridge/amd/amdmct/mct_ddr3: Clean up curly brace style violations | Timothy Pearson |
2015-11-10 | northbridge/amd/amdmct: Read SPD data into cache to decrease bootup time | Timothy Pearson |
2015-11-08 | amdmct/mct_ddr3: Disable Fam10h-specific MTRR setup on Fam15h | Timothy Pearson |
2015-11-02 | cpu/amd: Add initial AMD Family 15h support | Timothy Pearson |
2015-11-02 | northbridge/amd/amdmct/mct_ddr3: Fix S3 suspend overrunning the stack size limit | Timothy Pearson |
2015-11-02 | northbridge/amd/amdfam10: Set DIMM voltage based on SPD data | Timothy Pearson |
2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
2015-10-30 | northbridge/amd/amdmct/mct_ddr3: Add initial Suspend to RAM (S3) support | Timothy Pearson |
2015-10-27 | northbridge/amd/amdfam10: Limit maximum RAM clock to BKDG recommendations | Timothy Pearson |
2015-10-26 | northbridge/amd/amdmct: Fix broken AMD K10 DDR3 memory initalization | Timothy Pearson |
2015-10-23 | northbridge/amd/amdmct: Fix Family 15h detection | Timothy Pearson |
2015-10-23 | northbridge/amd/amdmct/mct_ddr3: Fix curly brace style violations | Timothy Pearson |
2015-06-10 | northbridge/amd/amdmct: Honor MMCONF_BASE_ADDRESS | Timothy Pearson |
2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
2015-04-01 | northbridge/amd/amdfam10: Collect DIMM information for ramstage use | Timothy Pearson |
2015-04-01 | northbridge/amd/amdmct: Pack MCT and DCT info structs | Timothy Pearson |
2015-03-07 | northbridge/amd/amdmct: Fix burst write depth on K10 rev. D and later | Timothy Pearson |
2015-03-03 | northbridge/amd/amdmct: Add revision D to K10 revision mask list | Timothy Pearson |
2015-02-16 | northbridge/amd/amdfam10: Remove Kconfig memory controller options | Timothy Pearson |
2015-02-16 | northbridge/amd/amdfam10: Fold back memory frequency based on MCT load | Timothy Pearson |
2015-02-15 | northbridge/amd/amdmct: Fix FTBFS with node interleaving enabled | Timothy Pearson |
2015-02-15 | northbridge/amd/amdmct: Allow override of memory settings via NVRAM | Timothy Pearson |
2015-01-25 | northbridge/amd: Add Kconfig options for ECC redirection | Timothy Pearson |
2015-01-25 | northbridge/amd: Add Kconfig options for ECC scrub rate | Timothy Pearson |
2015-01-08 | northbridge/amd: Doxygen fixes | Martin Roth |
2015-01-06 | northbridge: Drop print_ implementation from non-romcc boards | Stefan Reinauer |
2014-07-29 | Uniformly spell frequency unit symbol as Hz | Elyes HAOUAS |
2014-07-24 | northbridge/amd: Remove trailing whitespace | Elyes HAOUAS |
2014-07-08 | northbridge: Trivial - drop trailing blank lines at EOF | Edward O'Callaghan |
2014-05-23 | northbridge/amd/amdmct: Incorrect usage of logical over bitwise and | Edward O'Callaghan |
2014-05-23 | northbridge/amd/amdmct: Superfluous parenthesis in if-statements | Edward O'Callaghan |
2014-05-22 | northbridge/amd/amdmct/mct: Initialize variables at the eol | Edward O'Callaghan |
2014-01-28 | x86: add common definitions for control registers | Aaron Durbin |
2013-12-23 | Coding style: punctuation cleanup [1/2]. | Idwer Vollering |
2013-06-03 | northbridge/amd/amdmct: Use `static const` instead of `const static` | Paul Menzel |
2013-03-01 | GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« | Paul Menzel |
2012-05-08 | Some more #if cleanup | Patrick Georgi |
2012-05-08 | Clean up #ifs | Patrick Georgi |
2012-03-02 | Fix ECC disable option for AMD Fam10 DDR2 and DDR3. | Marc Jones |
2011-11-01 | remove trailing whitespace | Stefan Reinauer |
2011-10-15 | AMD CPU and chipset fixes for compilation with gcc 4.6 | Stefan Reinauer |
2011-09-24 | Add AMD Family 10h PH-E0 support | QingPei Wang |
2011-06-03 | This patch sets max freq defaults for ddr2 and ddr3for fam10. | Marc Jones |
2011-03-28 | Add AMD C32 support. | Zheng Bao |
2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-01-20 | For Cx, each ChipSel need to be sent MR command. | Zheng Bao |
2011-01-17 | The code is tested on my board with register DIMMs. More tests need to be | Zheng Bao |
2011-01-06 | Fix some settings fo AMD MCT. It is based on BIOS test suite. | Zheng Bao |
2010-12-02 | More explicite and straight way to set seed. | Zheng Bao |
2010-11-13 | MTRR related improvements for AMD family 10h and family 0Fh systems | Scott Duplichan |
2010-10-13 | Trivial. Clean up code and add some comments. | Zheng Bao |
2010-10-09 | Trivial. Spell checking. | Zheng Bao |
2010-10-09 | Trivial. Spell checking. | Zheng Bao |
2010-10-08 | Trivial. Spell checking. | Zheng Bao |
2010-10-08 | Trivial. Fix the typo. | Zheng Bao |
2010-10-01 | Trivial. Re-indent the code. | Zheng Bao |
2010-09-28 | Trivial. re-Indent the code. | Zheng Bao |
2010-09-27 | Obviously missing brackets. | Xavi Drudis Ferran |
2010-09-21 | Complete the code which was missing. | Zheng Bao |
2010-09-21 | Fix the typo. Field DisAutoRefresh is in DramTimngHi. | Zheng Bao |
2010-09-09 | Please find appended. This patch gets rid of the %gs magic altogether, | Arne Georg Gleditsch |
2010-09-09 | Also improve boot time on AMD for the DDR3 code path. | Arne Georg Gleditsch |
2010-09-09 | Apparently, it's not crucial to clear this at the exact moment we switch | Arne Georg Gleditsch |
2010-09-05 | Trivial. Currently the max frequency is preset as 400Mhz. We need to set a | Zheng Bao |
2010-09-04 | AMD DDR2 and DDR3 MCT function InitPhyCompensation() compliant with AGESA code. | Kerry She |
2010-08-31 | Get Byte65/66 for register manufacture ID code. RegMan1Present will | Zheng Bao |
2010-08-30 | Multi-DIMMS on AMD ddr2 MCT channel B fixed. | Kerry She |
2010-08-30 | Multi-DIMMS on AMD ddr3 MCT channel B works. | Kerry She |
2010-08-30 | Trivial syntax correction of AMD mct_ddr3 dir. | Kerry She |
2010-08-22 | documented workaround erratum 414, see | Xavi Drudis Ferran |
2010-08-22 | documented workaround erratum 372, see | Xavi Drudis Ferran |
2010-08-22 | Include RB_C3 in erratum 346 | Xavi Drudis Ferran |
2010-08-22 | Add RB_C3 to AMD_FAM10_ALL so that it gets its MSR right for mtrs, ht, etc. | Xavi Drudis Ferran |
2010-07-08 | Fix all warnings in the tree | Stefan Reinauer |