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path: root/src/northbridge/amd/amdmct
AgeCommit message (Expand)Author
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
2019-03-04arch/io.h: Add missing includesKyösti Mälkki
2019-03-01device/pci: Fix PCI accessor headersKyösti Mälkki
2019-01-07src: Move constant to the right side of comparisonElyes HAOUAS
2019-01-06device: Use pcidev_on_root()Kyösti Mälkki
2018-12-28src/northbridge: Get rid of device_tElyes HAOUAS
2018-11-27nb/amd/amdmct/{mct,mct_ddr3}: Replace "magic" numbers with macrosElyes HAOUAS
2018-11-16src: Remove unneeded include <console/console.h>Elyes HAOUAS
2018-11-16src: Get rid of duplicated includesElyes HAOUAS
2018-11-12src: Remove unneeded include "{arch,cpu}/cpu.h"Elyes HAOUAS
2018-11-08nb/amd/amdmct/mct_ddr3: Replace MTRR addresses with macrosElyes HAOUAS
2018-11-08src: Replace common MSR addresses with macrosElyes HAOUAS
2018-11-05amd/mtrr: Fix IORR MTRRElyes HAOUAS
2018-10-31reset: Finalize move to new APINico Huber
2018-10-30{cpu,drivers,nb,sb}/amd: Replace {MSR,MTRR} addresses with macrosElyes HAOUAS
2018-10-30src: Add missing include <stdint.h>Elyes HAOUAS
2018-10-23src: Remove unneeded whitespaceElyes HAOUAS
2018-10-18cpu/amd: Use common AMD's MSRElyes HAOUAS
2018-10-08Move compiler.h to commonlibNico Huber
2018-08-10src: Fix typoElyes HAOUAS
2018-08-09src/northbridge: Fix typoElyes HAOUAS
2018-08-08cpu/amd: Correct number of MCA banks clearedMarshall Dawson
2018-07-09src/northbridge: Use "foo *bar" instead of "foo* bar"Elyes HAOUAS
2018-06-14src: Get rid of unneeded whitespaceElyes HAOUAS
2018-06-14src: Get rid of device_tElyes HAOUAS
2018-05-09{device,drivers,lib,mb,nb}: Use only one space after 'if'Elyes HAOUAS
2018-05-04amd/mct/ddr3: Correctly configure CsMux67Patrick Georgi
2017-08-10nb/amd_fam10/mct_ddr3: Use common function to compute crc16 checksumArthur Heymans
2017-07-13Rename __attribute__((packed)) --> __packedStefan Reinauer
2017-07-08nb/amd: add IS_ENABLED() around Kconfig symbol referencesMartin Roth
2017-05-19drivers/spi/spi_flash: Pass in flash structure to fill in probeFurquan Shaikh
2017-03-02Revert "nb/amd/mct_ddr3: Fix RDIMM training failure on Fam15h"Daniel Kulesz
2017-02-25nb/amd/amdmct: Remove another currently unused tableJonathan Neuschäfer
2017-02-24nb/amd/amdmct: Remove two currently unused tablesJonathan Neuschäfer
2017-01-19nb/amd/ddr3: Make the maximum CDD a signed valueTimothy Pearson
2017-01-14amd/mct: Add default values to highest_rank_count for DDR2Timothy Pearson
2017-01-12amd/mct/ddr2: Remove orphaned Tab_TrefT_k variableTimothy Pearson
2017-01-11amd/mct/ddr3: Fix unintended sign extension warningTimothy Pearson
2017-01-11amd/mct/ddr3: Avoid using uninitialized register address in ECC setupTimothy Pearson
2017-01-11amd/mct/ddr3: Free malloced resources in failure branchesTimothy Pearson
2017-01-11amd/mct/ddr3: Rework memory speed to clock value conversion logicTimothy Pearson
2017-01-11amd/mct/ddr3: Correctly program maximum read latencyTimothy Pearson
2017-01-10amd/mct/ddr3: Allow critical delay delta to go negativeTimothy Pearson
2017-01-10amd/mct/ddr3: Correctly configure CsMux45Timothy Pearson
2017-01-10amd/mct/ddr3: Wait for northbridge P-state transitionsTimothy Pearson
2017-01-10amd/mct/ddr3: Fix incorrect DQ mask calculationTimothy Pearson
2017-01-10amd/mct/ddr2|ddr3: Refactor persistent members of DCTStatStrucTimothy Pearson
2017-01-04amdfam10: Perform major include ".c" cleanupDamien Zammit
2016-11-22spi: Clean up SPI flash driver interfaceFurquan Shaikh
2016-11-09nb/amd/amdmct/mct: Remove commented codeElyes HAOUAS
2016-10-09northbridge/amd/amdmct/mct_ddr3: Remove commented codeElyes HAOUAS
2016-10-04src/northbridge: Remove unnecessary whitespaceElyes HAOUAS
2016-09-21northbridge/amd/amdmct: Improve code formattingElyes HAOUAS
2016-09-12src/northbridge: Improve code formattingElyes HAOUAS
2016-08-31northbridge/amd: Add required space before opening parenthesis '('Elyes HAOUAS
2016-08-23src/northbridge: Remove unnecessary whitespace before "\n" and "\t"Elyes HAOUAS
2016-08-01Remove non-ascii & unprintable charactersMartin Roth
2016-05-09nb/amd/mct_ddr3: Report correct DIMM size in SMBIOS structureTimothy Pearson
2016-05-09nb/amd/mct_ddr3: Add support for non-ECC DIMMs on AMD Family 15hTimothy Pearson
2016-05-02nb/amd/mct_ddr3: Only initialize ECC bits onceTimothy Pearson
2016-05-01nb/amd/mct_ddr3: Warn if MaxRdLatency training fails on Family 15hTimothy Pearson
2016-05-01nb/amd/mct_ddr3: Stop receiver enable cycle training after window foundTimothy Pearson
2016-05-01nb/amd/mct_ddr3: Do not constantly reset read data timing registers to 0Timothy Pearson
2016-05-01nb/amd/mct_ddr3: Skip nibble training when current DIMM is not x4Timothy Pearson
2016-05-01nb/amd/mct_ddr3: Fix x4 DIMM receiver enable training on Fam15hTimothy Pearson
2016-04-28nb/amd/mct_ddr3: Restart system on training failure instead of using die()Timothy Pearson
2016-04-26nb/amd/mct_ddr3: Report correct DIMM in MRS setup routinesTimothy Pearson
2016-04-26nb/amd/mct_ddr3: Fix a number of minor errors in RDIMM setupTimothy Pearson
2016-04-25nb/amd/mct_ddr3: Scale lane delays for each DIMM after MEMCLK changeTimothy Pearson
2016-04-22Revert "nb/amd/mct_ddr3: Disable MCE framework during DRAM training"Timothy Pearson
2016-04-22nb/amd/mct_ddr3: Enhance debugging around MEMCLK frequency changeTimothy Pearson
2016-04-22nb/amd/mct_ddr3: Fix RDIMM training on certain DIMMsTimothy Pearson
2016-04-22nb/amd/mct_ddr3: Run fence training on each node after memory clock changeTimothy Pearson
2016-04-11and/nb/mct_ddr3: Pack all structures passed to ramstage and set alignmentTimothy Pearson
2016-04-11nb/amd/amdfam10: Write MCT variables to flash after PCI configurationTimothy Pearson
2016-04-08Revert "nb/amd/mct_ddr3: Enable DIMM parity when RDIMMs installed"Timothy Pearson
2016-04-08nb/amd/mct_ddr3: Reenable sync flood after ECC initTimothy Pearson
2016-04-08nb/amd/mct_ddr3: Add MCE reporting logicTimothy Pearson
2016-04-08nb/amd/mct_ddr3: Cache whether ECC is allowed at the platform levelTimothy Pearson
2016-04-01nb/amd/mct_ddr3: Fix revision mask for DR processorsTimothy Pearson
2016-03-31nb/amd_mct_ddr3: Move DRAM MCE sync flood enable to ramstageTimothy Pearson
2016-03-31nb/amd/mct_ddr3: Clear early MCEs and report DRAM MCEsTimothy Pearson
2016-03-31nb/amd/mct_ddr3: Disable MCE framework during DRAM trainingTimothy Pearson
2016-03-30nb/amd/mct_ddr3: Enable DIMM parity when RDIMMs installedTimothy Pearson
2016-03-30northbridge/amd/amdfam10: Add family15h model10h-1fh (Trinity)Damien Zammit
2016-03-28nb/amd/mct_ddr3: Use standard C function calls in mct_ResetDataStruct_D()Timothy Pearson
2016-03-26nb/amd/amdmct: Select max_lanes based on ECC presence or absenceDamien Zammit
2016-03-24nb/amd/mct_ddr3: Set the NBP0 read latency from P0 trained valuesTimothy Pearson
2016-03-23nb/amd/mct_ddr3: Remove spurious Addl_Index variable in dqsTrainMaxRdLatency_...Timothy Pearson
2016-03-21nb/amd/amdmct/mct_ddr3: Ensure BlockRxDqsLock does not remain setTimothy Pearson
2016-03-13nb/amd/mct_ddr3: Use correct initial UI setting during DRAM trainingTimothy Pearson
2016-03-12nb/amd/mct_ddr3: Consolidate duplicated codeTimothy Pearson
2016-03-11nb/amd/mct_ddr3: Train correct receiver in TrainDQSRdWrPos_D_Fam15Timothy Pearson
2016-03-11nb/amd/mct_ddr3: Consolidate calls to MCT minimum clock setting fetchTimothy Pearson
2016-03-11nb/amd/mct_ddr3: Require minumum training quality for both read and writeTimothy Pearson
2016-03-11nb/amd/mct_ddr3: Set read DQS delay to 1UI before calculating read latencyTimothy Pearson
2016-03-11nb/amd/mct_ddr3: Properly initialize arrays and add bounds checksTimothy Pearson
2016-03-11nb/amd/mct_ddr3: Restore previous DQS delay values on failed loopTimothy Pearson
2016-02-19nb/amd/amdmct: Add socket specific configuration for FM2Damien Zammit
2016-02-05nb/amd/mct_ddr3: Fix RDIMM training failure on Fam15hTimothy Pearson