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2016-01-04Revert "AMD OemS3Save: refactor for Merlin Falcon"Kyösti Mälkki
This reverts commit d3deecdd9c5c0a8031f2ea9d6c90e0997f123d93. Do not mix open-source AGESA and binary PI trees. Once you have working S3 support for binaryPI platforms, add the adapted oem_s3.c file as northbridge/amd/pi/oem_s3.c instead. Change-Id: I7c981d0023a5c0225e046f9c0104acfa07436b79 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/12282 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-12-08northbridge/amd/agesa/agesawrapper.c: Fix Kconfig symbolsMartin Roth
The Kconfig symbols were missing an underscore, so were not getting evaluated properly. Change-Id: I619cf3f44f44f9c9699482d64164d3db28cd4c8f Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/12559 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-11-06AGESA BiosCallouts: Remove castKyösti Mälkki
This cast only hides errors in matching the API properly. Change-Id: Ic396dfb572a50ac5ce5c1c83424e1f17f15bad1d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/12270 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
It encourages users from writing to the FSF without giving an address. Linux also prefers to drop that and their checkpatch.pl (that we imported) looks out for that. This is the result of util/scripts/no-fsf-addresses.sh with no further editing. Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/11888 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-10-30AMD mainboards: Fix 64bit BiosCallOuts.cStefan Reinauer
Change-Id: I0f3297dff47dfb44da034ac6f305dcf1981b9de1 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/11080 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-10-30Port AGESA based northbridge code to 64bitStefan Reinauer
This is extending http://review.coreboot.org/#/c/10583/ (29e6548) to the remaining AGESA northbridge drivers. Change-Id: I6fa53b36a1420e92cb4aecb0f7b4c71541a94c71 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/11021 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-09-30amd/family14: Add k10temp thermal zone.Tobias Diedrich
The thermal sensor interface exposed in function 3 of the northbridge is a more convenient and faster way to access the processor-internal thermal sensor than using the SMBus/SB-TSI interface from the FCH, see the Family14 BKDG: "Tctl is a processor temperature control value used for processor thermal management. Tctl is accessible through SB-TSI and D18F3xA4[CurTmp]. Tctl is a temperature on its own scale aligned to the processors cooling requirements" Also on at least some of these boards the existing thermal zone is broken and always returns 40C (the default value if the SMBus read failed) because the SMBus muxing register (SmBus0Sel) is not set up correctly. Case in point: The fallback "smbus read failed" temperature is 40 C and the the logs taken from the board status repository for the Asrock E350M1 board all show: "ACPI: Thermal Zone [TZ00] (40 C)" e.g. http://review.coreboot.org/gitweb?p=board-status.git;a=blob;f=asrock/e350m1/4.0-5054-gf584218/2013-12-20T20:56:20Z/kernel_log.txt#l390 and http://review.coreboot.org/gitweb?p=board-status.git;a=blob;f=asrock/e350m1/4.0-7030-g6d7de4f/2014-10-16T15:34:19Z/kernel_console.txt#l404 and http://review.coreboot.org/gitweb?p=board-status.git;a=blob;f=asrock/e350m1/4.0-9989-gf2dfef0/2015-06-13T00:22:49Z/kernel_log.txt#l425 Example lm-sensors output with this patch on the pcengines APU1, on Linux 4.1.0-rc8+ (wiht both CONFIG_ACPI_THERMAL and CONFIG_SENSORS_K10TEMP enabled): acpitz-virtual-0 Adapter: Virtual device temp1: +54.0 C (crit = +100.0 C) k10temp-pci-00c3 Adapter: PCI adapter temp1: +54.0 C (high = +70.0 C) (crit = +100.0 C, hyst = +97.0 C) Change-Id: Id9c5b783ba424246816677099ec6651814e59f21 Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de> Reviewed-on: http://review.coreboot.org/10940 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-09-14AGESA S3 support: Fix excessive stack usageKyösti Mälkki
Commit 300caced9 introduced stack overflow when HAVE_ACPI_RESUME is selected as the temporary storage for MTRRs is 4KiB. Change-Id: I993df6abc04436fb135822729c4931c5c7496e5a Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/11633 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-07-21Port Fam14 northbridge code to 64bitStefan Reinauer
Change-Id: I694b739a29e9d82d153d9fb3b729dc250bd4901e Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Signed-off-by: Scott Duplichan <scott@notabs.org> Reviewed-on: http://review.coreboot.org/10583 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
2015-06-22AMD OemS3Save: refactor for Merlin FalconWANG Siyuan
Merlin Falcon(Carrizo) replaces struct AMD_S3SAVE_PARAMS with struct AMD_RTB_PARAMS and replaces AMD_S3_PARAMS with S3_DATA_BLOCK. Change-Id: If074a8de95d82130d29b2e3cfbd7e35cdb9b929d Signed-off-by: WANG Siyuan <wangsiyuanbuaa@gmail.com> Signed-off-by: WANG Siyuan <SiYuan.Wang@amd.com> Reviewed-on: http://review.coreboot.org/10526 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-06-10PCI subsystem: Drop PCI_64BIT_PREF_MEM optionKyösti Mälkki
No board in the tree selects this and it looks like the implementation was done at chipset level while it should be part of PCI subsystem. When enabled, at least AMD K8 and f14, f15tn and f16kb fail build test. Feature of placing prefetchable PCI memory above 4GB may not work if there is any 32-bit only prefetchable PCI BARs in the system. Change-Id: I40ded2c7d6d05f461423721aa5d78a78f9f9ce1e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8705 Tested-by: build bot (Jenkins) Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-06-05device_ops: add device_t argument to write_acpi_tablesAlexander Couzens
`device_t device` is missing as argument. Every device_op function should have a `device_t device` argument. Change-Id: I1ba4bfa0ac36a09a82b108249158c80c50f9f5fd Signed-off-by: Alexander Couzens <lynxis@fe80.eu> Reviewed-on: http://review.coreboot.org/9599 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-06-05device_ops: add device_t argument to acpi_fill_ssdt_generatorAlexander Couzens
`device_t device` is missing as argument. Every device_op function should have a `device_t device` argument. Change-Id: I7fca8c3fa15c1be672e50e4422d7ac8e4aaa1e36 Signed-off-by: Alexander Couzens <lynxis@fe80.eu> Reviewed-on: http://review.coreboot.org/9598 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-06-05AMD K8 fam10: Use parent subordinate to track HT enumerationKyösti Mälkki
Change-Id: I930f2beacdc95d0a7edd07db66a1c2e58bb2f3cd Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8566 Tested-by: build bot (Jenkins) Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
2015-06-04devicetree: Change scan_bus() prototype in device opsKyösti Mälkki
The input/output value max is no longer used for tracking the bus enumeration sequence, everything is handled in the context of devicetree bus objects. Change-Id: I545088bd8eaf205b1436d8c52d3bc7faf4cfb0f9 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8541 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-06-04PCI subsystem: Drop parameter max from scan_busKyösti Mälkki
Change-Id: Ib33d3363c8d42fa54ac07c11a7ab2bc7ee4ae8bf Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8539 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-06-04devicetree: Rename unused parameter max in domain_scan_bus()Kyösti Mälkki
For the PCI root node, input parameter max==0 and output value max is not relevant for operation. Change-Id: I23adab24aa957c4d51d703098a9a40ed660b4e6c Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8855 Tested-by: build bot (Jenkins) Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
2015-06-04devicetree: Rename unused parameter to passthruKyösti Mälkki
The actual use of the parameter max is to keep track of PCI bus number while recursively scanning PCI bridges or PCI-e rootports. Neither CPU, SMBus, LPC or other static buses are involved in this enumeration, but the way bridge operations were originally designed forced to pass this argument thru unrelated functions. Follow-up removes these once the function prototype gets fixed. Change-Id: Idbc9c515a362c571a1798bb36972058b309c2774 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8535 Tested-by: build bot (Jenkins) Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
2015-06-04HyperTransport: Use subordinate property to track chain enumerationKyösti Mälkki
For amdfam10, (ht_c_index > 3) never evaluates true as the code already has a return for this case above. Change-Id: Ie90941671e1b2b4f42e2b1b0641ca59334fcf0f1 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8688 Tested-by: build bot (Jenkins) Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-06-02cbfs: new API and better program loadingAaron Durbin
A new CBFS API is introduced to allow making CBFS access easier for providing multiple CBFS sources. That is achieved by decoupling the cbfs source from a CBFS file. A CBFS source is described by a descriptor. It contains the necessary properties for walking a CBFS to locate a file. The CBFS file is then decoupled from the CBFS descriptor in that it's no longer needed to access the contents of the file. All of this is accomplished using the regions infrastructure by repsenting CBFS sources and files as region_devices. Because region_devices can be chained together forming subregions this allows one to decouple a CBFS source from a file. This also allows one to provide CBFS files that came from other sources for payload and/or stage loading. The program loading takes advantage of those very properties by allowing multiple sources for locating a program. Because of this we can reduce the overhead of loading programs because it's all done in the common code paths. Only locating the program is per source. Change-Id: I339b84fce95f03d1dbb63a0f54a26be5eb07f7c8 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9134 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-05-27AGESA: Reduce SPI use by 24kB for S3 supportKyösti Mälkki
There is no need to backup VolatileStorage in SPI flash at all. At the time we need it, we have CBMEM available. Change-Id: If0ca57b314140a833d6d59fe9e236e07816f05a4 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/10318 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
2015-05-27AGESA: Separate HeapManager declarations from BiosCallOutsKyösti Mälkki
Change-Id: I168db92b10d5abc05be2dc374df3f892003d5255 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/10317 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
2015-05-27AGESA: Split S3 backup in CBMEMKyösti Mälkki
Use separate CBMEM allocations for stack and heap on S3 resume path. The allocation of HIGH_SCRATCH_MEMORY is specific to AGESA and is moved out of globals and ACPI. This region is a replacement for BIOS_HEAP_SIZE used on non-resume paths. Change-Id: I6658ce1c06964de5cf13b4e3c84d571f46ce76f3 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/10316 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-05-26Make acpi_fill_hest into parameterVladimir Serbinenko
This avoids the need to supply weak function and avoids associated risks of forgetting to link in relevant files. Change-Id: Ie96475babb4aa4ea8db49023af5b31bfa63b21dc Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7373 Tested-by: build bot (Jenkins) Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
2015-05-26AGESA: Refactor OEM S3 storageKyösti Mälkki
Use function prototypes that match more closely with the structure of other OEM hooks in agesawrappers. Change-Id: Id241fdce78a21a5138ef60ac2f841b694da92241 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8606 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
2015-05-26AGESA: Move S3 related SPI writes againKyösti Mälkki
This is more agesawrapper-related code than CPU. Change-Id: I3058ef965a83aed1972e02f0f566f81d5dbd7adf Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/10295 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
2015-05-26AGESA f16kb: Fix PCI device notationFabian Kunkel
Old file defines wrong PCI devices (1.2 2.2 3.2 4.2 5.2). Wrong defines cause PCI devices not to be found in the pirq_data table. Example error output: PCI IRQ: Found device 0:02.01 using PIN A PCI Devfn (0x11) not found in pirq_data table PCI IRQ: Found device 0:02.02 using PIN B Found this device in pirq_data table entry 3 Orig INT_PIN : 2 (PIN B) PCI_INTR idx : 0x02 (INTC# ) INT_LINE : 0xA (IRQ 10) PCI IRQ: Found device 0:02.03 using PIN C PCI Devfn (0x13) not found in pirq_data table PCI IRQ: Found device 0:02.04 using PIN D PCI Devfn (0x14) not found in pirq_data table PCI IRQ: Found device 0:02.05 using PIN A PCI Devfn (0x15) not found in pirq_data table Patch fixes, that pirq_data entries for pci devices 2.1 - 2.5 get found. Change-Id: I4503433427f4ec90d022b65084c52077ba4f3511 Signed-off-by: Fabian Kunkel <fabi@adv.bruhnspace.com> Reviewed-on: http://review.coreboot.org/10289 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
2015-05-26acpi: Remove monolithic ACPIVladimir Serbinenko
All boards now use per-device ACPI. This patch finishes migration by removing transitional kludges. Change-Id: Ie4577f89bf3bb17b310b7b0a84b2c54e404b1606 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7372 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-05-23AGESA: Drop DIMM_SUPPORT, _DDR3 and _REGISTEREDKyösti Mälkki
Not referenced anywhere. Change-Id: I57180ccfab93e45df9982d08bad71834a04eb9f9 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/10280 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-05-21Remove address from GPLv2 headersPatrick Georgi
As per discussion with lawyers[tm], it's not a good idea to shorten the license header too much - not for legal reasons but because there are tools that look for them, and giving them a standard pattern simplifies things. However, we got confirmation that we don't have to update every file ever added to coreboot whenever the FSF gets a new lease, but can drop the address instead. util/kconfig is excluded because that's imported code that we may want to synchronize every now and then. $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, *MA[, ]*02110-1301[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 59 Temple Place[-, ]*Suite 330, Boston, MA *02111-1307[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.:Foundation, Inc.:" {} + $ find * -type f -a \! -name \*.patch \ -a \! -name \*_shipped \ -a \! -name LICENSE_GPL \ -a \! -name LGPL.txt \ -a \! -name COPYING \ -a \! -name DISCLAIMER \ -exec sed -i "/Foundation, Inc./ N;s:Foundation, Inc.* USA\.* *:Foundation, Inc. :;s:Foundation, Inc. $:Foundation, Inc.:" {} + Change-Id: Icc968a5a5f3a5df8d32b940f9cdb35350654bef9 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9233 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2015-05-20acpi: make fill_slit and fill_srat into arguments.Vladimir Serbinenko
SLIT and SRAT are created this way only on amdk8 and amdfam10. This saves the need of having a lot of dummies. Change-Id: I76d042702209cd6d11ee78ac22cf9fe9d30d0ca5 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7052 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-29kbuild: automatically include northbridgesStefan Reinauer
This change switches all northbridge vendors and southbridges to be autoincluded by Makefile.inc, rather than having to be mentioned explicitly in northbridge/Makefile.inc or in northbridge/<vendor>/Makefile.inc. This means, vendor and northbridge directories are now "drop in", e.g. be placed in the coreboot directory hierarchy without having to modify any higher level coreboot files. The long term plan is to enable out of tree components to be built with a given coreboot version (given that the API did not change). Change-Id: I8468154dbfaaaffcba9fda27ba2d7b9049ad5c19 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/9800 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-09northbridge/amd/agesa/familyXY: Make NULL device op explicitEdward O'Callaghan
Use 'DEVICE_NOOP' macro introduced in: commit 530355d include/device/device.h: Provide DEVICE_NOOP macro shim to provide formalism. Make the null device ops here explicit and in-line with formalism elsewhere. Change-Id: I2400b29a5108a6bae21959177e53321810ca1407 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/8035 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-04-07kconfig: drop intermittend forwarder filesStefan Reinauer
With kconfig understanding wildcards, we don't need Kconfig files that just include other Kconfig files anymore. Change-Id: I7584e675f78fcb4ff1fdb0731e340533c5bc040d Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/9298 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-03-07AGESA: Move agesawrappers related to HAVE_ACPI_RESUME supportKyösti Mälkki
This change brings all agesawrappers in a single file to make it easier to understand the actual execution flow. Change-Id: Ifbb2b16e4cccfaa17aaf10887a856797be9b6877 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8605 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-07AGESA: Use same HeapManager for all BiosCallOutsKyösti Mälkki
We do not allow platforms to mess around with memory layout. Change-Id: I316ff522c8833fa3b7ad20f2c5a9cae21f4174d8 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8604 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-01AGESA fam16: Drop HyperTransport scanKyösti Mälkki
Already done for fam15tn/rl. Change-Id: Id74ca13610a4ef407c866a4419139287413078a4 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8531 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-02-14AGESA fam15tn fam15rl fam16kb: Drop HT3_SUPPORTKyösti Mälkki
Kconfig variable is not implemented. Change-Id: I546a1001847e7b1002f96baf49ed3301852a6894 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8345 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-02-14AGESA fam10 fam12 fam15: Always have HT3_SUPPORTKyösti Mälkki
Keep the slower HyperTransport configuration for a possible reference in fam15 boards. Change-Id: Ifcdedc6385fec80f7d02c55c2aac10e5e2429a18 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8344 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-01-27CBMEM: Tag chipsets with LATE_CBMEM_INITKyösti Mälkki
In preparation to remove the static CBMEM allocator, tag the chipsets that still do not implement get_top_of_ram() for romstage. LATE_CBMEM_INIT also implies BROKEN_CAR_MIGRATE. Change-Id: Iad359db2e65ac15c54ff6e9635429628e4db6fde Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7850 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Aaron Durbin <adurbin@google.com> Tested-by: build bot (Jenkins)
2015-01-09amd/agesa/family12/northbridge.c: Indent (tab) fixEdward O'Callaghan
Trivial; Use tab over space for indent. Change-Id: Iba0e006197a020157b11746dd4999d87a8ca8d97 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/8015 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-01-07northbridge/amd/agesa/family1{4,5}: Remove cruft from dimmSpd.cEdward O'Callaghan
Remove useless comment pretaining to abusing pragma's for old GCC/GDB interaction issues. Change-Id: Ic83a0285ac947a23699a81a82b89de08a47ab052 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/8017 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-12-20AGESA: Use common agesawrapperKyösti Mälkki
Callout FCH_OEM_CONFIG is made during AMD_INIT_RESET, so it was required to provide GetBiosCallOut here too. Change-Id: I0eab858677d14536293385ca37daab3e538132e6 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7826 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-20AGESA fam15tn fam15rl fam16kb: Add OemInitMid()Kyösti Mälkki
Change-Id: Icbad42168ec3afb7780c0c2ddc17aa405e08d693 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7825 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-20AGESA: Add OemCustomize hooks structureKyösti Mälkki
We should potentially provide an OEM platform hook to manipulate parameters around any entry point to AGESA. Use structure for such ops to avoid weak functions and lots of empty function stubs. Change-Id: I99bf7de8a1e2f183399d2216520a45d0c24fd64c Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7824 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-20AGESA fam15: Unify agesawrapperKyösti Mälkki
Disable TSC output for now. Change-Id: I078b4f0170aaf0ada58e464cf609c234204f8196 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7822 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-20AGESA: Common laterunaptask()Kyösti Mälkki
Change-Id: I580f975aa987a333074de3d63744ad5f9008377d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7821 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-20AGESA: Common agesawrapper_amdinitlate()Kyösti Mälkki
Change-Id: I3d532989559ffd7fd0f63e15c2c60bcfe5ec9101 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7820 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-20AGESA fam15: Ignore AmdCreateStruct() errorsKyösti Mälkki
Change-Id: I1b7c95e08d74784e0f144cd5836d46bda64a3596 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7819 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-20AGESA: Use memset() on agesawrappersKyösti Mälkki
Change-Id: Icc8da62c6d1644e16f7db6c634796ad597c755c6 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7818 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-20AGESA fam12 fam14: Use lowercase void in agesawrappersKyösti Mälkki
Change-Id: I1755796049c2c3f2090cd6a4b4e28a71b807c7c1 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7817 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-20AGESA fam14: Add amd_initenv()Kyösti Mälkki
Not part of wrapper to AGESA, but workaround for enable_resources(). Also remove remains of comments in non-fam14 wrappers. Change-Id: I2526821ca283feb6a506b602b86f817f8b03b341 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7816 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-20AGESA: Add amd_initcpuio() and amd_initmmio()Kyösti Mälkki
These are not wrappers for AGESA as they do not enter vendorcode at all. We expect most of the added fixme.c file to be written without use of AMDLIB.h and parts relocated as northbridge enable_resources(). Change-Id: Iba6d59e2a7672349208e9a65fcd2cb1094ab7d50 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7815 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-20amd/torpedo: Drop unused code in agesawrapperKyösti Mälkki
Change-Id: I4c7fdfb64689cc8ba7e00bd7966d5c5857baf7c3 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7814 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-20AGESA fam14: Increase MMCONF regionKyösti Mälkki
Increase to max 64 buses, as there are no benefits of limit 16. NOTE: It appears there is no matching (early) programming of the region to non-posted MMIO. Change-Id: I664789f7bd90992840e5817555cd3621c2d1e86c Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7813 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-20AGESA fam12: Fix MMCONF regionKyösti Mälkki
MMIO for non-posted region used hard-coded setting for 64 buses while MSR programming was for 256 buses. Change-Id: I690237dd459f7b7b4da68ae55ae9d22b79e5f255 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7812 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-12-19AGESA: Remove redundant redeclarationKyösti Mälkki
Change-Id: I9172769c314850b384abbddf0200d5833e2a8b26 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7811 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-12-19AGESA: Only fam14 sets Ontario APU IDsKyösti Mälkki
Change-Id: I3d249a1234599e3820e4ad9b852bbb03a89dd49a Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7810 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-12-19AGESA fam12 fam14: Drop EXT_CONF_SUPPORTKyösti Mälkki
Only used on non-AGESA board siemens/sitemp_g1p1 and already dropped from other AGESA families. Change-Id: Ifa726d38216c8b684af06af26b701daa99c42e8c Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7808 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-19spd_cache debug: Log invalid CRC checksumTobias Diedrich
"SPD has a invalid or zero-valued CRC" is not a very useful message, so show the actual and expected values. Change-Id: I31a1cdacc82240c699627769d490b94f5d378e86 Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de> Reviewed-on: http://review.coreboot.org/7393 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-12-08northbridge/amd: Add the audio device to the PCI devicesDave Frodin
Change-Id: I826f98e450c9a614930a5e83c7c6bfb4ccdc5984 Signed-off-by: Dave Frodin <dave.frodin@se-eng.com> Reviewed-on: http://review.coreboot.org/7630 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
2014-12-03AGESA: Trace execution with AGESA_EVENTLOG()Kyösti Mälkki
Change-Id: I5601ed92ca808603b0a9edad118ca54aa168aceb Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7604 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-12-03AGESA: Common agesawrapper for S3 resumeKyösti Mälkki
Change-Id: I27cd073331659e47d241a0ce249b2d080b4bab5c Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7162 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-12-03AGESA: Add common eventlogKyösti Mälkki
Change-Id: Ibbf10a53ea671990d336340fdc96dfb37b5defd0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7161 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-12-03AGESA fam16kb: Move clearing of NoSnoopEnable bitKyösti Mälkki
Originally from commit 4ca72139 move this code now from cpu/ to northbridge/. Change-Id: I38517cff273dd8f78bf5eda1d48fd1cd820ced88 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7603 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-03AGESA: Remove duplicate OemCustomizeInitEarly declarationsKyösti Mälkki
Change-Id: I59b2c3f235a6b30e68e78c2fe4065fbc0488bc4c Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7158 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-12-03AGESA fam15tn / fam15rl / fam16kb: Common agesawrapperKyösti Mälkki
Split FCH parts to southbridge/hudson. Change-Id: Ibe305fc3e47422523a57ffa9cf69cd401c786ee2 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7159 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-12-03AGESA fam14: Common agesawrapperKyösti Mälkki
Use copy of amd/persimmon. Change-Id: I7404cb164df9065bcdbaaf5367018870ea675adc Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7157 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-03AGESA fam12: Common agesawrapperKyösti Mälkki
Change-Id: Ic44d827323dc0d3c776e79c22088a2f1f654bcf2 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7156 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-03AGESA fam15: Common agesawrapperKyösti Mälkki
Place empty OemCustomizeInitEarly() and OemCustomInitPost() in a common file for now and split eventlog parser to a separate file. Change-Id: Ia8277ad13a800898b3e1a4e9c8fbd838ae2efeae Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7155 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-03AGESA: Report events with AGESA_EVENTLOG()Kyösti Mälkki
NOTE: For fam12 and fam14 ASSERT() is defined empty so execution may fall through critical failures. Change-Id: Ifef65d749d340f1df3a43b5fcb38c4315ef944e8 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7154 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-12-03AGESA: Use common header for agesawrapperKyösti Mälkki
Change-Id: I5189d0c55635aeb29553fd04a67490cfee3d88d5 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7153 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-11-27northbridge/amd/agesa/family15rl: Provide Richland supportEdward O'Callaghan
Provide our current development support for Richland. We would however like to see a unification of 'northbridge/amd/agesa' instead of another copy-paste merged. Change-Id: I88005939844d1132cfd3531a9d47389320026814 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7536 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-11-26agesa/family12: Switch to per-device ACPIVladimir Serbinenko
Change-Id: I944e35b04612eca8add80c9f546df99a9a930ac8 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7036 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-11-26agesa/family16kb: Switch to per-device ACPIVladimir Serbinenko
Change-Id: I7d9cbbd1aeadecc1a4c91816df303c6cb4817fe3 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7034 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-11-26agesa/family15tn: Switch to per-device ACPIVladimir Serbinenko
Change-Id: Icc2e7b66b3ff5f70b219a3e67494ce3df055c9d5 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7033 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-26agesa/family15: Switch to per-device ACPIVladimir Serbinenko
Change-Id: I3847eb1524a5a816cd4885a31d703b410804c1f0 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7032 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-11-26agesa/family14: Fix includes for ACPIKyösti Mälkki
Change-Id: Ic4425840a984a7713088a2568e25bae982e22fc2 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7582 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2014-11-25agea/family14: Switch to per-device ACPIVladimir Serbinenko
Change-Id: Icc663c28713f2d872bfeb1749303ce92db953bf5 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7031 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-11-25northbridge/amd/agesa/family16kb: Add MMCONF res to PCI_DOMAINEdward O'Callaghan
This is a port of the following: commit d5c998be99709c92f200b3b08aed2ca3fee2d519 The coreboot resource allocator doesn't respect resources claimed in the APIC_CLUSTER. Move the MMCONF resource to the PCI_DOMAIN to prevent overlap with PCI devices. Change-Id: I49167dd3f15d0203a7db8950880ab03171d5c170 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7533 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-11-25northbridge/amd/agesa/family12/dimmSpd.c: Use ARRAY_SIZE macroEdward O'Callaghan
Change-Id: Icf980088c196b152cc4e5e179f7b7e334b695ccc Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7574 Tested-by: build bot (Jenkins) Reviewed-by: Nicolas Reinecke <nr@das-labor.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-11-24northbridge/amd/agesa: Remove useless northbridge.h headerEdward O'Callaghan
Remove northbridge.h headers which only contain static declaritions which is silly. Change-Id: I3e8890a34b4729bb0944bd97a3b9576b841d2354 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7532 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-11-24northbridge/amd/agesa/family15: Remove redudant prototypeEdward O'Callaghan
Function is static local only and so no need for a static prototype in header. Sync's header with other fam's also. Change-Id: I540aeafb8528e229700b6d596d4d8094c22e7625 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7531 Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-11-24northbridge/amd/agesa/family1{2,4}: make get_node_pci() staticEdward O'Callaghan
Function is local only, as is with other families also. Change-Id: I1f652be1763a319b2f1c9b0f53e76d6bc44f3450 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7530 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-11-24northbridge/amd/agesa/family1{4,5,5tn,6kb}: Reduce differencesEdward O'Callaghan
Lets cut down on whitespace differences, fix some typos and indents. Also make use of ARRAY_SIZE() macro instead of a local redefinition. Fix NULL pointer checks ordering and not to use zero. Change-Id: I93f344d300c04570d795659d848255cb1832e1d8 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7528 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-11-22amdfam10: Move to per-device ACPIVladimir Serbinenko
Change-Id: I9ce2333e1ea527843f83d411dea2a669263156c2 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7027 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-21northbridge/amd/agesa/Kconfig: Trivial - correct indentEdward O'Callaghan
Change-Id: Ia7d9cb77f83afda66a1fe4e1228f2728c94e1c99 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7535 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
2014-11-21northbridge/amd/agesa: DEVICE_NOOP some stub functionsEdward O'Callaghan
Use 'DEVICE_NOOP' over stub functions to reduce loc and improve formalism. Change-Id: I9c8d608539647cce22fb1dfbe284a6043d3d23d9 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7534 Tested-by: build bot (Jenkins) Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
2014-11-20AMD: Isolate AGESA and PI build environmentsKyösti Mälkki
To backport features introduced with recent Chromebooks and/or Intel boards in general, heavy work on the AMD AGESA platform infrastructure is required. With the AGESA PI available in binary form only, community members have little means to verify, debug and develop for the said platforms. Thus it makes sense to fork the existing agesawrapper interfaces, to give AMD PI platforms a clean and independent sandbox. New directory layout reflects the separation already taken place under 3rdparty/ and vendorcode/. Change-Id: Ib60861266f8a70666617dde811663f2d5891a9e0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7149 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Tested-by: build bot (Jenkins)
2014-11-14AMD: Move RAMBASE and RAMTOPKyösti Mälkki
There are no reasons to not load ramstage @ 0x100000. Boards with HAVE_ACPI_RESUME enabled have performance penalty in using excessive RAMTOP. For these boards, this change releases 11 MiB of RAM from CBMEM allocation to OS. Change-Id: Ib71995aba5e9332d0ec1626b3eb3b4ef6a506d1c Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7094 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-06northbridge: DEVICE_NOOP some stub function callbacksEdward O'Callaghan
Reduces loc and makes NOP's explicit. Change-Id: I8a117b150b8b421c7a18b48a2ac36d15679f20b0 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7344 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-11-01northbridge/amd: Use DEVICE_NOOP macro over dummy symbolEdward O'Callaghan
Change-Id: I3fdd2a9f981592112998d74ce4cfe4850d8fab31 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7288 Tested-by: build bot (Jenkins) Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
2014-10-22AGESA boards: Fix early agesawrapper_amdinitmmio()Kyösti Mälkki
Regression introduced with commit 7b23ae0 AGESA: Trace execution with AGESAWRAPPER() As the call is made before console_init() is called it must not call any printk(). Debugging Olivehill and Parmer platforms using a custom FPGA (as these boards have no Super-IO UART) have been observed to halt and/or delay at early boot. Change-Id: I3ab4e5378db44aece9046c8636cde1053ce5390d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7059 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins) Reviewed-by: WANG Siyuan <wangsiyuanbuaa@gmail.com>
2014-10-19AGESA: Drop board and chipset -specific callout headersKyösti Mälkki
Change-Id: If973f28931e65a57cbb8d6739542a57c844f0d66 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7115 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-10-19AGESA fam12 fam14 fam15: Use common agesa_readSpd()Kyösti Mälkki
Remove northbridge specific callouts for AGESA_READ_SPD. Move low-level SMBus code to southbridge. Change-Id: I5fc91c49d9ef8e0af1c4d8194f857c61ce417d1d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7113 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-10-19AGESA fam15tn fam16kb 00730f01: Add common agesa_readSpd()Kyösti Mälkki
Remove northbridge specific callouts for AGESA_READ_SPD. Move low-level SMBus code to southbridge. Change-Id: I3e272389e2a7db542fb48fca8606325af27b65a5 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7112 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-10-16ACPI: Remove CONFIG_GENERATE_ACPI_TABLESVladimir Serbinenko
As currently many systems would be barely functional without ACPI, always generate ACPI tables if supported. Change-Id: I372dbd03101030c904dab153552a1291f3b63518 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4609 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-08-30AMD Steppe Eagle: Add northbridge files for new SoC familyBruce Griffith
Add the northbridge file for AMD's new Mullins and Steppe Eagle processor family. Since the processor family name is not the same across AMD's sales and marketing channels, I have elected to use part of the processor ID as the family name. The intent is to reduce confusion since the processor ID is the same for both families. This northbridge support has only been validated on the AMD Embedded variants ("Steppe Eagle"). The AGESA wrappers in coreboot have a function that is intended to mirror the UMA memory allocation performed during memory initialization by AGESA. Update the Steppe Eagle memory allocation to mimic the memory reservation done inside the AGESA BLOB. Change the default CBMEM address, the default video BIOS device ID, and a couple of other defaults to match changes in coreboot community code. The northbridge chip.h specifies how many processor sockets, how many channels, and how many DIMM slots are supported by the northbridge. Steppe Eagle does not permit multisocket systems and has only one memory controller channel. Change-Id: I20d8b78e3b153cda2dd05100fbb75e2ebadd9e08 Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Reviewed-on: http://review.coreboot.org/6678 Tested-by: build bot (Jenkins) Reviewed-by: WANG Siyuan <wangsiyuanbuaa@gmail.com> Reviewed-by: Zheng Bao <zheng.bao@amd.com>
2014-08-16AMD Family 14: Fix permissions on one northbridge fileBruce Griffith
fam14_callouts.h should not have the execute bit set. Change-Id: Iab44d04f2c9669e28d2d5028b0a11e565cc7bb07 Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Reviewed-on: http://review.coreboot.org/6675 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-31northbridge/amd/agesa/agesawrapper_call.h: Decode status codesEdward O'Callaghan
Decode obscure AGESA status codes into their respective string forms. Change-Id: Iccf175ef62e5005af6ebbfb1bd0acec8aedc2eaa Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6402 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>