Age | Commit message (Collapse) | Author |
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This fixes a longstanding TODO item.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5205 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Each Intel 440BX board should select this option if it has 4 DIMM
slots on the PCB, and _not_ select it (it defaults to 'n') if it
has 3 DIMMs on the PCB.
Signed-off-by: Keith Hui <buurin@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5204 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Also configure GPIOs so the power LED is working.
Some whitespace cleanups (but by no means comprehensive)
Signed-off-by: Knut Kujat <knuku@gap.upv.es>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5203 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Replace set_init_ram_access with the call to set_var_mtrr.
Remove unused #include statments.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5201 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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WAIT_BEFORE_CPUS_INIT. It's disabled by default
(see src/cpu/x86/Kconfig)
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5198 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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and increase MAX_CPUS to aid support 6-core CPUs.
Signed-off-by: Arne Georg Gleditsch <arne.gleditsch@numascale.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5197 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Keith Hui <buurin@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5188 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Convert all DEBUG_SMBUS, DEBUG_SMI, and DEBUG_RAM_SETUP custom and
local #defines into globally configurable kconfig options (and Options.lb
options for as long as newconfig still exists) which can be enabled
by the user in the "Debugging" menu.
The respective menu items only appear if a board is selected where the
chipset code actually provides such additional DEBUG output.
All three variables default to 0 / off for now.
Also, drop a small chunk of dead/useless code in the
src/northbridge/via/cn700/raminit.c file, which would otherwise break
compilation.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reworked to still apply to trunk, added X86EMU_DEBUG (and make the x86emu/yabel
code only work printf instead of a redefined version of printk and
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5185 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Also, fix another typo in the ms9652 board name.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5184 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5183 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- Fix whitespace, alignment, and indentation in a few places.
- Some more consistency fixes in license headers.
- Fix incomplete license header: src/mainboard/msi/ms9652_fam10/devicetree.cb.
- Fix typo for LIMIT_HT_SPEED_1800: s/1.6GHz/1.8GHz/.
- Fix typo in src/mainboard/msi/ms9652_fam10/Kconfig: s/MS-9256/MS-9252/.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5182 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- Check that this doesn't run into vga/oprom/bios area at link time
- Avoid overly complicated and not well understood hack which avoids that
area by leaving a hole in the stack area.
- Adapt technexion/tim5690 to put ramstage at 1MB
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5181 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Updated Timothy's patch to match recent changes in the tree. It's build tested.
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5180 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This is needed on the IP1000T to get VGA output. The VGA option rom will ask
through an SMI for hardware specifics (in form of a VBT, video bios table)
which the SMI handler copies into the VGA option rom.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5177 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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board now)
- Change ACPI_SSDTX_NUM to either 4 or 5 for boards that have ssdtX.asl
files, according to the number of ssdtX.asl there.
- Remove custom ssdt rules
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5176 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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and it's not working anyways.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5174 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This should eventually go, as fadt seems to be better
put into the southbridge
- Add config flag for boards that have get_bus_conf.c
Might be cleaned out as well, no idea
- Use flags where appropriate.
- Move the following rules to src/arch/i386/Makefile.inc:
- fadt.o
- dsdt.o
- acpi_tables.o
- get_bus_conf.o
- Rename objs_dsl_template in toplevel Makefile to the more
appropriate objs_asl_template
- Remove all Makefiles that are empty now, which includes
src/mainboard/Makefile.k8_CAR.inc and
src/mainboard/Makefile.k8_ck804.inc
and the include statements that used these files.
- Add workaround to intel/xe7501devkit:
It uses ACPI in an unusual way: It adds a MADT, but no
DSDT. As this is highly unusual, I didn't want to add
explicit support for that scenario (and encourage such
uses that way), and added a dummy dsdt.asl instead. It
will be linked to dsdt.o, but not linked into the final
binary.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5171 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- introduce BOARD_HAS_HARD_RESET and use it if a board provides
hard_reset in $(MAINBOARDDIR)/reset.c, instead of some chipset component
- move a couple of rules out of the mainboards' Makefiles into
src/arch/i386/Makefile.inc:
initobj-y += crt0.o
obj-y += mainboard.o
obj-$(CONFIG_GENERATE_MP_TABLE) += mptable.o
obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o
obj-$(CONFIG_BOARD_HAS_HARD_RESET) += reset.o
- remove Makefile.incs that are empty (or comment-only) after these
changes, incl. Makefile.romccboard.inc (and references to it)
- Make include not fail if Makefile.inc doesn't exist.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5168 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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cd coreboot/src/southbridge
svn mv i82801ca i82801cx
svn mv i82801dbm i82801dx
svn mv i82801er i82801ex
svn copy i82801xx i82801bx
svn mv i82801xx i82801ax
Plus, fixing up the filenames in these directories and the romstage.c and
Kconfig files of the mainboards using those drivers.
Plus, switching the thomson ip1000 and rca rm4100 to the i82801dx driver.
There's a lot more to be done, like
- adding device IDs for the ICH3 and newer drivers that have been kept in
i82801xx so far
- drop the additional parts support from the ax and bx drivers.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Joseph Smith <joe@settoplinux.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5167 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5165 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Joseph Smith <joe@settoplinux.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5164 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This patch also changes the digitallogic/adl855pc to use that port.
It probably won't work, but at least we will get an error if something
breaks compilation of the i855 code that is there.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5163 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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is not something users have to concern themselves with anymore.
Also fixes some wrong romstrap configs for boards, fixing a couple
of them.
Also add "make printcrt0s" target for debugging crt0s when updating
modified checkouts.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5162 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- More license header cosmetics.
- New official "Building coreboot" document is now at:
http://www.coreboot.org/Build_HOWTO
- Drop "(mostly those derived from the Linux kernel)" part of the GPL-v2-only
parts from the README. Many other files are also GPL-v2-only, too.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5161 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Anish K. Patel <anishp@win-ent.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5158 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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builds and boots correctly.
Signed-off-by: Knut Kujat <knuku@gap.upv.es>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5154 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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PS/2 keyboard API.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5152 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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infrastructure (special linking, data structures, etc)
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5150 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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since cbmem
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5148 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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4KiB is not enough to work.
Additionally, modify the device tree so that the undocumented LDN 6
is ignored by the resource allocator, and while here, assign the
parallel port DRQ, hardware monitor IRQ and drop NIC MAC address
on SMBus EEPROM hint, the ms7135 doesn't have such hardware.
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5147 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5139 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5138 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- drop include/part and move files to include/
- get rid lots of warnings
- make resource allocator happy with w83627thg
- trivial cbmem resume fix
- fix payload and log level settings in abuild
- fix kontron mptable for virtual wire mode
- drop some dead includes and dead code.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5136 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- Consistently use the same wording and formatting for all license headers.
- Remove useless whitespace, add missing whitespace, fix indentation.
- Add missing "This file is part of the coreboot project." where needed.
- Change "(C) Copyright John Doe" to "Copyright (C) John Doe" for consistency.
- Add some missing "(C)" strings and copyright years where needed.
- Move random comments and file descriptions out of the license header.
- Drop incorrect file descriptions completely (e.g. lpc47m10x/Makefile.inc).
There should be no changes in _content_ of the license headers, if you spot
such changes that's a bug, please report!
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5127 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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(IP1000T) of onboard memory.
Signed-off-by: Joseph Smith <joe@settoplinux.org>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5122 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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what it was supposed to do in xcompile now..
Moved ap_romstage.o rule to src/arch/i386/Makefile.inc, too.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5115 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Also, delete duplicate romstage file in qemu-x86
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5111 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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(See last commit)
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5100 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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src/arch/i386/Makefile.inc
For that to work, I had to:
- Add a CONFIG_ROMCC variable
- Set that variable on all ROMCC boards
- conditionally choose romcc or gcc rule based on that variable
- remove those two rules from all the boards' Makefiles
- switch a couple of boards to HAVE_OPTION_TABLE, as they actually have.
Also remove the duplication of rules with the sole difference of if
they depend on option_table.h or not.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5099 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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retire duplicate function.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5098 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Permit early setup of COM2
Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5097 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- unify all iasl related rules into the toplevel Makefile
- build a filesystem standard for ACPI files and use it
- pass ACPI sources through cpp, so constants can be shared
between C and ACPI more easily
- use cpp's #include instead of ACPI's Include() so cpp gets
the whole picture
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5094 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Apparently they are not used. If you have any of the boards touched in this
commit, please test and report (so we can figure out what to do with the
ap_romstage.c files in general)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5093 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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cache_as_ram_auto.c and auto.c are both called "romstage.c" now.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5092 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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our parallel build server ;-)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5091 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5090 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5089 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5088 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Harald Gutmann <harald.gutmann@gmx.net>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5086 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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were two SB_HT_CHAIN_ON_BUS0 sections in the mainboard Kconfig file - one
setting the parameter to 0, the other setting it to 2.
Revision 5051 removed one of the two SB_HT_CHAIN_ON_BUS0 sections - the wrong
one. This patch fixes that.
Revision 5051 removed the wrong setting because newconfig for this board was
*also* wrong. This patch fixes that too.
Tested on real hardware, both with Kconfig and newconfig.
Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5083 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This automatically adds the settings for those boards that didn't have settings
at all yet. Also, small fixup to compareboard.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
--> Please help porting all boards from newconfig to Kconfig <--
This is a lot of janitor work and we can use your helping hands.
The sooner we can get rid of Kbuild, the better. The KBuild report
on the mailing list shows the config differences between newconfig
and Kconfig. In theory, all Kconfig configs should be equal to their
newconfig pendant. In practice it's better to come close but stay
clean.
--> Please help porting all boards from newconfig to Kconfig <--
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5082 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This makes the code more similar to the h8dmr_fam10 target in order to make
the diff between both smaller and more readable.
Build-tested with newconfig and kconfig.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5080 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5076 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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following remaining issues:
- ACPI not working
- SMBus gets irq 0 instead of 5
- Loading VGA rom fails (using seabios to do it)
(copied a newer Makefile.inc from h8dmr_fam10 vs. the patch on the list)
Signed-off-by: Knut Kujat <knuku@gap.upv.es>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5075 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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row/side of memory at a time.
Signed-off-by: Joseph Smith <joe@settoplinux.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5073 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Joseph Smith <joe@settoplinux.org>
Acked-by: Joseph Smith <joe@settoplinux.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5069 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5068 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5067 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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* fix iasl output directory for i945 boards (patch
for moving it to the mainboard directory will follow)
* coreboot_table.c: lb_mainboard can be static
* coreboot_table.c: dump memory table in debug and spew mode
* fix a warning in bootblock.c
* don't include arch/i386/init in arch/i386/Makefile.inc
* announce generation of crt0_includes.h
* allow overriding $(obj)
* drop unused src_types from Makefile
* correctly use hostname -s instead of hostname for COMPILE_HOST
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5065 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Joseph Smith <joe@settoplinux.org>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5064 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- Invalidate Cache Tags (by means of in-place rewrite of cache data) which allows CAR data to be flushed to RAM
- Re-enable cache after flush of CAR to RAM
Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5055 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Fix timer handling on amd/sc520 systems
Match UDELAY_* configuration of newconfig in Kconfig
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5054 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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DIMM_SUPPORT
APIC_ID_OFFSET
ACPI_SSDTX_NUM
IRQ_SLOT_COUNT
MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
(except msi/ms9185)
MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
MEM_TRAIN_SEQ
HAVE_ACPI_RESUME
Also remove MMX (kconfig specific) and HAVE_MOVNTI and IOAPIC
(which we deliberately differ in kconfig) from compareboard
report.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5052 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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HT_CHAIN_UNITID_BASE
HT_CHAIN_END_UNITID_BASE
SB_HT_CHAIN_ON_BUS0
SB_HT_CHAIN_UNITID_OFFSET_ONLY
MAX_CPUS
MAX_PHYSICAL_CPUS
ROM_SIZE
TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
Also hook up asus/p2b-ds
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5051 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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When any of the onboard network cards are disabled, the bus numbers change
and thus PCI devices in the riser wouldn't get their interrupts right if a
kernel without ACPI support is booted. This patch dynamically creates the
correct bus numbers for the firewire and riser card entries
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5043 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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so it's possible to use the LCD panel connector. Values are hard coded instead
of read from CMOS but it's a start.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5042 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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from mainboards.
Some adaptations were necessary after the IOAPIC cleanup,
so this should fix the build.
Fix intel/d945gclf build, which was missing some ACPI component.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5039 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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smart iasl will segfault.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5038 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5035 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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http://www.roda-computer.com/en/products/notebooks/rocky-iii-rk886ex.html
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5031 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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of components. This patch is a rewrite of the generic IOAPIC setup code.
Additionally it drops the other 12 instances of IOAPIC setup code and
makes the components use the generic code.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5023 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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read32(unsigned long addr) vs readl(void *addr)
and
write32(unsigned long addr, uint32_t value) vs writel(uint32_t value, void *addr)
read32 was only available in __PRE_RAM__ stage, while readl was used in stage2.
Some unclean implementations then made readl available to __PRE_RAM__ too which
results in really messy includes and code.
This patch fixes all code to use the read32/write32 variant, so that we can
remove readl/writel in another patch.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5022 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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and guard SMI specific parts of the ACPI code.
(trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5018 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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* drop debug.c files from 945 mainboards (and share it in the northbridge code)
* adapt the mainboard and auto.c files for above changes.
Rather trivial
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5016 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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instead of the equivalent copy in src/cpu/emulation/qemu-x86/northbridge.c.
Also, delete the copy.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5006 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- via/epia-cn is a romcc board, not a CAR board. (Thanks Kevin, for the report)
- Make emulation/qemu-x86, dell/s1850, via/epia-cn use Makefile.romccboard.inc
- New flag: BIG_BOOTBLOCK, which is always the inverse of tinybootblock
Suitable for Makefile.inc rules (foo-$(CONFIG_BIG_BOOTBLOCK) += ...)
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5005 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This patch also aligns the configuration of a couple of
boards more closely to what newconfig does.
Also, the romstrap inc/lds files are declared in the
Makefiles of the southbridges they belong to, instead of
some global file.
AMD CPUs have their own timer functions, so disable UDELAY_IO
for them and set HAVE_INIT_TIMER as appropriate, same for
emulation/qemu-x86.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5000 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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for tinybootblock
- move asus/m2v-mx_se to tinybootblock
- Add romstrap for via southbridge to tinybootblock-bootblock
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4999 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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* Don't implicitly add __PRE_RAM__ in romcc.
Fixes intel/xe7501devkit
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4998 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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(defaults to UDELAY_IO again, like newconfig)
- Use UDELAY_TSC on Via C7 [kconfig]
- Support Tinybootblock on Intel CPUs
- set XIP location correctly for Tinybootblock on Intel
- provide correct XIP location in Tinybootblock configuration
- Make kontron/986lcd-m use Tinybootblock
- Some kconfig fixes to kontron/986lcd-m [kconfig]
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4997 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- Set __PRE_RAM__ define per default
- Properly handle ignored (#ifdef'd out) #include lines
amd/serengeti_cheetah_fam10:
- write ACPI files to $(obj) instead of the top dir (alias $(CURDIR))
tinybootblock:
- provide a way to define code that should be added to the bootblock,
to map the entire ROM for use by CBFS
amd/model_fxx, amd/model_10xxx:
- add CONFIG_SSE
walkcbfs.S:
- eliminate the use of two registers, to make space for romcc to wiggle
amd/serengeti_cheetah_fam10:
- use the enable_rom framework. not entirely functional yet
Boot-tested on emulation/qemu-x86
Build-tested on amd/serengeti_cheetah_fam10
amd/serengeti_cheetah_fam10 fails in amdht/ somewhere, but builds
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4994 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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mainboard function to be built.
Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4992 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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(.text+0x4989): undefined reference to `vgabios_init'
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4991 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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functions: int15 getting LCD panel ID.
Signed-off-by: Libra Li <libra.li@technexion.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4990 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Introduce the tiny bootblock infrastructure and use it on QEmu.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4989 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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fully). Also fix the kconfig build for HAVE_ACPI_RESUME.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4985 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Rudolf Marek <r.marek@assembler.cz>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4978 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4974 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4973 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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ID_SECTION_OFFSET
which is normally set to 0x10 (the current default) and set to 0x80 (the current alternative)
where necessary (if romstraps get in the way).
For Kconfig, the special case is set per southbridge (as these define the necessity for this
workaround), for newconfig it's added to each single board.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4962 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4960 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Usually, this means adding values to Kconfig, but in a few cases, adding values
to newconfig, too (which doesn't hurt).
Also really hook up tyan/s2850 and tyan/s2875 to kconfig, and have them still
build.
Trivial and stupid kconfig changes, just lots of them.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4959 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4956 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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I forgot to svn add the speaker.c and speaker.h.
Signed-off-by: Libra Li <libra.li@technexion.com>
Acked-by: Zheng Bao <zheng.bao@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4955 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Change EARLY_STAGE into __PRE_RAM__.
Signed-off-by: Libra Li <libra.li@technexion.com>
Acked-by: Zheng Bao <zheng.bao@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4954 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Libra Li <libra.li@technexion.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4948 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Remove all remaining warnings from qemu.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4939 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Libra Li <libra.li@technexion.com>
Added object reference to Config.lb, too and
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4928 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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now handled more generically using CBFS.
Simplify the option ROM code in device/pci_rom.c, since there are only two ways
to get a ROM address now (CBFS and the device) and add an exception for qemu.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4925 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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files.
These boards have non-trivial differences:
gigabyte/m57sli
kontron/986lcd-m
dell/s1850
via/epia-m700
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4924 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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