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2022-01-04mb/google/brya: Add new baseboard nissa with variants nivviks and nereidReka Norman
Add a new baseboard for nissa, an Intel ADL-N based reference design. Also, add variants for the two reference boards, nivviks and nereid. This commit is a stub which only adds the minimum code needed for a successful build. BUG=b:197479026 TEST=abuild -a -x -c max -p none -t google/brya -b nivviks abuild -a -x -c max -p none -t google/brya -b nereid Change-Id: I2a3975fb7a45577fec8ea7c6c9f6ea042ab8cba5 Signed-off-by: Reka Norman <rekanorman@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60271 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kangheui Won <khwon@chromium.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
2022-01-04mb/google/brya/var/taeko: Run-time probe for NVMe SSD and MMCKevin Chang
Taeko will use two PCIE port signals with one slot, one CLK and one CLKREQ at next build. In order to accommodate this, probe statements are added to the devicetree. This only affects NVME SSD and EMMC. BUG=b:211914322 TEST=Build FSP with debug output enabled, and observe the correct root ports being initialized depending on the FW_CONFIG values for BOOT_EMMC and BOOT_NVME. Cq-Depend: chromium:3358662 Signed-off-by: Kevin Chang <kevin.chang@lcfc.corp-partner.google.com> Change-Id: I4486f23ea02374c84a9b1ce04f568d78aeabd573 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60341 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-01-04src/mb: Remove unused <string.h>Elyes HAOUAS
Change-Id: I5f2710b2034882a24a041d99e37ec364193d85e6 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60551 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-01-04mb/google/guybrush/var/nipperkin: update USB 2.0 controller Lane ParameterKevin Chiu
Enhance USB 2.0 SI by increasing the level of "HS DC Voltage Level" and "Disconnect Threshold Adjustment" per port: port#0: COMPDISTUNE0: 0x1->0x5 / TXVREFTUNE0: 0x3->0x9 port#1: COMPDISTUNE0: 0x1->0x5 / TXVREFTUNE0: 0x3->0x9 port#4: COMPDISTUNE0: 0x1->0x6 / TXVREFTUNE0: 0x3->0xE port#5: COMPDISTUNE0: 0x1->0x5 / TXVREFTUNE0: 0x3->0x9 BUG=b:203049656 BRANCH=guybrush TEST=1. emerge-guybrush coreboot chromeos-bootimage 2. pass USB eye diagram verification Change-Id: If5a6563e93bfa6beb529a5593fcc9124ce62d77f Signed-off-by: Kevin Chiu <kevin.chiu@quantatw.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60089 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Rob Barnes <robbarnes@google.com>
2022-01-04mb/google/brya/var/taeko: Modify DPTF setting for taekoKevin Chang
The new settings from the thermal team improve performance mainly with respect to fan control settings. BRANCH=None BUG=b:212210824 TEST=Built and tested on taeko board Signed-off-by: Kevin Chang <kevin.chang@lcfc.corp-partner.google.com> Change-Id: I2d5c9b6dff87a2e8897d74f3be89c965db22fe16 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60400 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-01-04mb/google/brya/var/taeko: swap TPM i2c with TS i2c for the next buildKevin Chang
Taeko is going to exchange i2c port for touchscreen and cr50. BUG=b:211911780 TEST=build pass Signed-off-by: Kevin Chang <kevin.chang@lcfc.corp-partner.google.com> Change-Id: Ib7273ba107c58e4cd90db00e301a399d7a7df76d Reviewed-on: https://review.coreboot.org/c/coreboot/+/60330 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: YH Lin <yueherngl@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-01-04mb/google/brya/var/kano: Set vGPIO reset typeDavid Wu
Due to the vGPIO is not reset when we power on through S5, we would met MCA when PCIE send L1 request without following Ack BUG=b:207527331 TEST=S0->S3->S5->power key->S3->S0, see if boot up normal Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com> Change-Id: I3df66eea13a3284d1453d7db6f7845e42a1dcb7b Reviewed-on: https://review.coreboot.org/c/coreboot/+/60334 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: YH Lin <yueherngl@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-01-04mb/google/brya/anahera: Add new memory supportWisley Chen
Add the new memory support: Hynix H54G46CYRBX267 Samsung K4U6E3S4AB-MGCL Hynix H54G56CYRBX247 Samsung K4UBE3D4AB-MGCL BUG=b:212328327 TEST=FW_NAME=anahera emerge-brya coreboot Change-Id: Ib08a1348333accdbb7551ef428d8d130b621dd9f Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60411 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-01-04mb/google/brya/var/redrix: Add new memory supportWisley Chen
Add the new memory support: Hynix H54G46CYRBX267 Samsung K4U6E3S4AB-MGCL Hynix H54G56CYRBX247 Samsung K4UBE3D4AB-MGCL BUG=b:212330664 TEST=FW_NAME=redrix emerge-brya coreboot Change-Id: I32491f86813c8e6566774d4b3d7d82295f906bd3 Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60410 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-01-04mb/google/brya/var/vell: update overridetree for DPShon Wang
update override devicetree for type-c display based on schematics BUG=b:209489126 TEST=emerge-brya coreboot Signed-off-by: Shon Wang <shon.wang@quanta.corp-partner.google.com> Change-Id: Icd2f5de38df0eb89fb92ea2abe25851c0d6ec53f Reviewed-on: https://review.coreboot.org/c/coreboot/+/60251 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-01-04mb/starlabs/labtop: Enable I2C4Sean Rhodes
Enable unused I2C4 PCI device (00:19.0) so that UART2 (00:19.2) can be enumerated properly, using `PchSerialIoSkipInit` to prevent FSP-S from configuring anything regarding I2C4 (e.g. GPIOs). Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I9c2c4f67672ba5667ebdae9ecc01054449dd3dfd Reviewed-on: https://review.coreboot.org/c/coreboot/+/60264 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Andy Pont <andy.pont@sdcsystems.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-01-04starlabs: Convert EC_GPE_SCI to KconfigSean Rhodes
Convert EC_GPI_SCI to Kconfig option with default value of 0x50 that is used by most boards. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I8d47ebe76394fe1bcb217e0c6211db1566f82189 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60229 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-01-04mb/google/guybrush/var/dewatt: disable unused PCIe clock settingKenneth Chan
GPP_CLK1 is used for SD and GPP_CLK2 is for WWAN on guybrush. Disable unused PCIe GPP_CLK1 and GPP_CLK2 for dewatt. BUG=b:211566312 TEST=emerge-guybrush coreboot Signed-off-by: Kenneth Chan <kenneth.chan@quanta.corp-partner.google.com> Change-Id: If449453bc60ed41e104346429babc06a73acef64 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60328 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Rob Barnes <robbarnes@google.com>
2022-01-04sb/intel: Use `bool` for PCIe coalescing optionAngel Pons
Retype the `pcie_port_coalesce` devicetree options and related variables to better reflect their bivalue (boolean) nature. Change-Id: I6a4dfe277a8f83a9eb58515fc4eaa2fee0747ddb Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60416 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-01-04mb/asus/p2b: list all unused Super I/O resourcesKeith Hui
Some Super I/O resources were unused and not listed, causing warnings during resource allocation. Suppress these warnings by setting them to zero. Change-Id: I28e37c3a58f3a6b5a613733f26ac18d6a7b3be2e Signed-off-by: Keith Hui <buurin@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41459 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-01-03mb/google/dedede/var/bugzzy: Initialize display signals on user modeSeunghwan Kim
Bugzzy uses panel-built-in touch screen, it needs to set panel power and reset signal to high for touch screen to work. On user mode, coreboot doesn't initialize graphics since there is no screen display before OS. So we would add a WA to initialize required signals on user mode. It takes under 30 ms delay on booting time. BUG=b:205496327 BRANCH=dedede TEST=Verified touch screen worked with test coreboot and test touch screen 028D firmware Signed-off-by: Seunghwan Kim <sh_.kim@samsung.corp-partner.google.com> Change-Id: Iaa4d16deb932f43ae1ab33ff5b4e74120ab670db Reviewed-on: https://review.coreboot.org/c/coreboot/+/60190 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-01-03mb/google/brya/var/brask: Change I2C/DDC signalsRory Liu
The latest schematics changes the EN_PP3300_SSD from GPP_D11 to GPP_F14, I2C/DDC signals from GPP_E22/E23 to GPP_D11/D12. BUG=b:206602609 TEST=build pass Signed-off-by: Rory Liu <rory.liu@quanta.corp-partner.google.com> Change-Id: I1e4aa6c540806c34b4a642f7813de0a64c6ea2b0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60530 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Zhuohao Lee <zhuohao@google.com> Reviewed-by: David Wu <david_wu@quanta.corp-partner.google.com>
2022-01-03mb/google/brya/var/gimble: Update Slow Slew RateMark Hsieh
- Set slow slew rate VCCIA and VCCGT to 8 BUG=b:206704930 TEST=USE="project_gimble emerge-brya coreboot" and verify it builds without error. Signed-off-by: Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com> Change-Id: I1e36c29e82af631cd650d46b67f031d275c97711 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60277 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: YH Lin <yueherngl@google.com>
2022-01-01mb/google/rambi: Select board-specific options per boardFelix Singer
Move board-specific selects out of common configuration and add them to each board where necessary. Change-Id: I20d79d4b42908314dbf7021a67b92e5fd2b79556 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60364 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2022-01-01mb/google/volteer: Move selects from Kconfig.name to KconfigFelix Singer
Move selects from Kconfig.name to Kconfig so that the configuration is at one place and not distributed over two files. Change-Id: I72c0e0c3968cb2e92b35381691762148f4c270e4 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60369 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2022-01-01mb/google/deltaur: Select board-specific options per boardFelix Singer
Move board-specific selects out of common configuration and add them to each board where necessary. Change-Id: I71f22100fe56a8b88321d220f98ac03887ce6bd7 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60367 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2022-01-01mb/google/deltaur: Move selects from Kconfig.name to KconfigFelix Singer
Move selects from Kconfig.name to Kconfig so that the configuration is at one place and not distributed over two files. Change-Id: I9b523ebee2d2af8585736588306ca687dfe16003 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60366 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2022-01-01mb/google/cyan: Move selects from Kconfig.name to KconfigFelix Singer
Move selects from Kconfig.name to Kconfig so that the configuration is at one place and not distributed over two files. Change-Id: Ifcdfd9fff197391ca0da083e7f6151c2dffe3374 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60362 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2022-01-01mb/google/auron: Select board-specific options per boardFelix Singer
Move board-specific selects out of common configuration and add them to each board where necessary. Change-Id: I5c437ee2d62415f9048a24ad4a517fc33eec3cf1 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60360 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-01-01mb/google/auron: Move selects from Kconfig.name to KconfigFelix Singer
Move selects from Kconfig.name to Kconfig so that the configuration is at one place and not distributed over two files. Change-Id: Ic9e001721baa7b7df89204eed03375e872c93e28 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60359 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2022-01-01mb/google/beltino: Move selects from Kconfig.name to KconfigFelix Singer
Move selects from Kconfig.name to Kconfig so that the configuration is at one place and not distributed over two files. Change-Id: Id1bbe7d68d9eace3f54e9decbd02f8b2b50d6867 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60357 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2022-01-01mb/google/jecht: Move selects from Kconfig.name to KconfigFelix Singer
Move selects from Kconfig.name to Kconfig so that the configuration is at one place and not distributed over two files. Change-Id: Ieb6626aeb2023ac27eac8a515cc0e561607f9f62 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60355 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2022-01-01mb/google/slippy: Select board-specific options per boardFelix Singer
Move board-specific selects out of common configuration and add them to each board where necessary. Change-Id: I1cfea0491f707052db2fbcee078e2c27c5a306c5 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60353 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2022-01-01mb/google/slippy: Move selects from Kconfig.name to KconfigFelix Singer
Move selects from Kconfig.name to Kconfig so that the configuration is at one place and not distributed over two files. Change-Id: I677770168caa95d95fd7d32cadc15ffae8455e8c Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60352 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2022-01-01mb/google/rambi: Move selects from Kconfig.name to KconfigFelix Singer
Move selects from Kconfig.name to Kconfig so that the configuration is at one place and not distributed over two files. Change-Id: Ibd78e1c42d6184127277c1b5dea66150027444fe Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60363 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2022-01-01src: Use 'stdint.h' when appropriateElyes HAOUAS
Change-Id: I1df255d55b8f43a711d836c2565c367bd988098a Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60549 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-01-01src: Remove duplicated includesElyes HAOUAS
Change-Id: I50cdffca34a6150ac11c3e83e1a603b766d1b84e Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60438 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-01-01src: Drop duplicated includesElyes HAOUAS
<types.h> already provides <commonlib/bsd/cb_err.h>, <limits.h>, <stdbool.h>, <stdint.h> and <stddef.h> headers. Change-Id: I700b3f0e864ecce3f8b3b66f3bf6c8f1040acee1 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60437 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-01-01mb/google/jecht/acpi: Replace LNot() with ASL 2.0 syntaxFelix Singer
Replace `LNot (a)` with `!a`. Change-Id: I4a9165b4610d7d035509b7f10eed0d9847afca1f Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60598 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2022-01-01mb/google/dedede/var/magolor: Set core display clock to 172.8 MHzRen Kuo
When using the default initial core display clock frequency, Magolor has a rare stability issue where the startup of Chrome OS in secure mode may hang. Slowing the initial core display clock frequency down to 172.8 MHz as per Intel recommendation avoids this problem. Depend on CL: https://review.coreboot.org/c/coreboot/+/60009 The CdClock=0xff is set in dedede baseboard,and we overwrite it as 0x0 (172.8 MHz) for magolor. BUG=b:206557434 BRANCH=dedede TEST=Build firmware and verify on fail DUTs. Check the DUTs can boot up in secure mode well. Change-Id: I5a0ad2bed79b37775184f0bd0a0ef024900cbe34 Signed-off-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60301 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-01-01mb/aopen/dxplplusu/acpi: Replace Decrement() with ASL 2.0 syntaxFelix Singer
Replace `Decrement (a)` with `a--`. Change-Id: I4320d86ce91e7070dc10fcefff6cbc0956be9788 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60586 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-01-01mb/aopen/dxplplusu/acpi: Replace Increment() with ASL 2.0 syntaxFelix Singer
Replace `Increment(a)` with `a++`. Change-Id: I52315e71a51de5c85f11d68854dfe68a474d5cbe Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60585 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2022-01-01mb/aopen/dxplplusu/acpi: Replace LOr() with ASL 2.0 syntaxFelix Singer
Replace `LOr (a, b)` with `a || b`. Change-Id: Ib563f8ce5873e53c94992d81e78118a1194fc9af Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60578 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2022-01-01mb/google/jecht: Replace LOr() with ASL 2.0 syntaxFelix Singer
Replace `LOr (a, b)` with `a || b`. Change-Id: Ib34e8af6668e3c875fabd1fa84862109afa94d18 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60577 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2022-01-01mb/aopen/dxplplusu/acpi: Replace LAnd() with ASL 2.0 syntaxFelix Singer
Replace `LAnd (a, b)` with `a && b`. Change-Id: Ifbd7b282061b27cda9d5d4c17e2ade9459e72c24 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60574 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-01-01mb/roda/rk9/acpi: Replace Multiply(a,b) with ASL 2.0 syntaxFelix Singer
Replace `Multiply (a, b)` with `a * b`. Change-Id: I8697f62cf5627ace8c4eac0caec7962171bb3541 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60567 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-01-01mb/google/kahlee/acpi: Replace Index() with ASL 2.0 syntaxFelix Singer
Replace `Index (FOO, 0)` with `FOO[0]`. Change-Id: I81a2d63db3e3575acd91ea99e1490701889b896f Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60560 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2022-01-01mb/google/corsola: Initialize krabby displayRex-BC Chen
PS8640 is used on Krabby board as the eDP bridge IC. Enable PS8640 and configure display in mainboard_init() to support display in firmware screen. BUG=b:210806060 TEST=saw firmware display on eDP panel of krabby and kingler. Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Change-Id: I314d5407c40429bb7bc50f36fece58e396b27548 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60447 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-01-01mb/google/corsola: Remove 'corsola' from Kconfig board namesRex-BC Chen
The 'Corsola' (MT8186 Chromebooks) family has two reference designs (Krabby and Kingler) and all real implementations should follow either one of the two. To prevent confusion, we should remove the 'corsola' configuration from Kconfig board names. BUG=b:210806060 TEST=emerge-corsola coreboot Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Change-Id: Ib354054e358c0783f6221c2e2a1730b5c6ddba33 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60515 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-01-01soc/mediatek/mt8186: Add support for regulator VRF12/VCN33Rex-BC Chen
To provide power to PS8640, the eDP bridge IC on krabby, add control of VRF12 and VCN33 to set voltage from MT6366. TEST=measure 1.2V from VRF12 and 3.3V from VCN33. BUG=b:210806060 Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Change-Id: I55a9ca16e1e335e9355d0a1b30c278a9969db197 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60446 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2021-12-31mb/google/brya/{brask,gimble}: Use eNEM for CAR by defaultSubrata Banik
More Brya variants like Brask and Gimble have migrated to use Alder Lake QS SoC which enables eNEM feature by default. Hence, select eNEM for CAR by default for these variants. BUG=b:168820083 TEST=Able to build and boot gimble variant using eNEM mode. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: Ie5734606e58410545a5f5421837080680664707f Reviewed-on: https://review.coreboot.org/c/coreboot/+/60377 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2021-12-31mb/google/slippy/acpi: Replace Add(a,b,c) with ASL 2.0 syntaxFelix Singer
Replace `Add (a, b, c)` with `c = a + b`. Change-Id: I1f18a327b5500eacfe8895ebabb1f2b294cef0d0 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60488 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2021-12-31mb/google/kahlee/acpi: Replace Add(a,b,c) with ASL 2.0 syntaxFelix Singer
Replace `Add (a, b, c)` with `c = a + b`. Change-Id: If80d97abc831e17bc8bc6e379bbae26e65db23f1 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60491 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2021-12-31mb/google/cyan/acpi: Replace Add(a,b,c) with ASL 2.0 syntaxFelix Singer
Replace `Add (a, b, c)` with `c = a + b`. Change-Id: I771c855e8885238c7fc3b0a7a6e9c2002274c0f2 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60490 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2021-12-31mb/google/jecht/acpi: Replace Add(a,b,c) with ASL 2.0 syntaxFelix Singer
Replace `Add (a, b, c)` with `c = a + b`. Change-Id: Ie7fa132623c7834e3d2f1acda032928579819a84 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60489 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2021-12-31mb/roda/rk9/acpi: Replace Add(a,b,c) with ASL 2.0 syntaxFelix Singer
Replace `Add (a, b, c)` with `c = a + b`. Change-Id: If2bb935570b1cb2b7a5e4168d594d735f343369b Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60487 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2021-12-31mb/aopen/dxplplusu/acpi: Replace Subtract(a,b,c) with ASL 2.0 syntaxFelix Singer
Replace `Subtract (a, b, c)` with `c = a - b`. Change-Id: I22088a584c1d6d5188cb74ff8b03f51ea02e4b68 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60479 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2021-12-30mb/google/jecht/acpi: Replace Subtract(a,b,c) with ASL 2.0 syntaxFelix Singer
Replace `Subtract (a, b, c)` with `c = a - b`. Change-Id: I604a5c56e1941dd2932eaa5b44966e6ea06abb4c Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60474 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2021-12-30mb/google/cyan/acpi: Use ASL 2.0 syntax to access arraysFelix Singer
Replace Index(FOO, 1337) with FOO[1337]. Change-Id: Ica59483c9e9f67361d269259708998f9152406f3 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60461 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2021-12-30mb/51nb/x210/acpi: Use ASL 2.0 syntax to access arraysFelix Singer
Replace Index(FOO, 1337) with FOO[1337]. Change-Id: I5692d1be5a94d259bbed987a43ec17ad1c1f915c Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60454 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2021-12-30mb/google/beltino/acpi: Use Printf() for debug printsFelix Singer
Change-Id: I3f4ac9ba134e20cc1808de125f87b84f86567303 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60423 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2021-12-29mb/google/octopus: Drop unnecessary optionFelix Singer
Since all variants select the option `BASEBOARD_OCTOPUS_LAPTOP`, drop it and move its selects to the common baseboard. Change-Id: Ia3d220401eeaa4255d6a4472eeed15c51f6a81a9 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60345 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2021-12-29mb/google/octopus: Move selects from Kconfig.name to KconfigFelix Singer
Move selects from Kconfig.name to Kconfig so that the configuration is at one place and not distributed over two files. Change-Id: I5949fc474c4923beb1f41a40876f03e5c70fc5b1 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60344 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2021-12-29mb/purism/librem_cnl/acpi: Use Printf() for debug printsFelix Singer
Change-Id: I587dcd8fc208562ecf0e0ba6ea9f741538511192 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60428 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2021-12-29mb/google/jecht/acpi: Use Printf() for debug printsFelix Singer
Change-Id: Ie54637c451252fd38aab9207ab0b846cc50f4b12 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60427 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2021-12-29mb/google/kahlee/acpi: Use Printf() for debug printsFelix Singer
Change-Id: Ib5ccba321f3cb737eb6287472314b06ebe6e2437 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60426 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2021-12-29mb/google/slippy/acpi: Use Printf() for debug printsFelix Singer
Change-Id: I8c0d1aaccb729eab91c88c77c5efc53d3e951692 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60425 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2021-12-29mb/google/zork/acpi: Use Printf() for debug printsFelix Singer
Change-Id: I433b7138da84b57e45e816ab116f8ca874fdc0e0 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60424 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2021-12-29mb/google/auron/acpi: Use Printf() for debug printsFelix Singer
Change-Id: Ib06452c7b89c328d124e98669178b5dd3fc235f8 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60422 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2021-12-29mb/hp/pavilion_m6_1035dx/acpi: Use Printf() for debug printsFelix Singer
Change-Id: Idf84b7333e94dfa9caf0aa477b87e3156c24d5cd Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60421 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2021-12-29mb/lenovo/g505s/acpi: Use Printf() for debug printsFelix Singer
Change-Id: Ibc775cda61134523dc03a073676b9d035ea48472 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60420 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2021-12-29mb/roda/rk886ex/acpi: Use Printf() for debug printsFelix Singer
Change-Id: I6091d81d49e5ae6bf30a03d2fb2d54f0ec6533d1 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60419 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2021-12-29mb/roda/rk9/acpi: Use Printf() for debug printsFelix Singer
Change-Id: Ic461c109b3c6d08cc3cda60f23e673157cd782f9 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60418 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2021-12-29mb/google/corsola: Initialize kingler displayRex-BC Chen
ANX7625 is used on Kingler board as the eDP bridge IC. Enable ANX7625 and configure display in mainboard_init() to support display in firmware screen. BUG=b:209930699 TEST=saw firmware display on eDP panel of kingler board. Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Change-Id: Ie8de5d8ba150d3ae086c7635601dbc0846aebe91 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60398 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2021-12-29mb/google/corsola: Add board common config for kingler and krabbyRex-BC Chen
Add common configs to help implementing board-specific logic (for example using different eDP bridge IC drivers). BUG=b:209930699 TEST=build pass Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Change-Id: If775532c1a262f3e8b3f11b24cae555844f2bfec Reviewed-on: https://review.coreboot.org/c/coreboot/+/60395 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2021-12-29mb/google/corsola: Fully calibrate DRAMRyan Chuang
Initialize and calibrate DRAM in romstage. DRAM full calibration logs: dram_init: dram init end (result: 1) DRAM-K: Full calibration passed in 20014 msecs TEST=DRAM full calibration pass. BUG=b:202871018 Signed-off-by: Ryan Chuang <ryan.chuang@mediatek.corp-partner.google.com> Change-Id: I80a18a8be5b1d47a5f0f7afed9601c0884e69035 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60386 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2021-12-28mb/google/brya: Reorder selects alphabeticallyFelix Singer
Change-Id: Ie03f7049b013648372b002ce9b731589b1fffabd Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60371 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-12-28mb/google/volteer/Kconfig: Reorder selects alphabeticallyFelix Singer
Change-Id: I2416456bd447a6296ca3fac6cf90aa2e78f6de57 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60368 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2021-12-28mb/google/deltaur/Kconfig: Reorder selects alphabeticallyFelix Singer
Change-Id: I36a02f8d509ef39983b4162188abc0cbc3d570cf Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60365 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2021-12-28mb/google/cyan/Kconfig: Reorder selects alphabeticallyFelix Singer
Change-Id: I445dbe5d1f744c6512d618efdc927509d5ba291f Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60361 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2021-12-28mb/google/auron/Kconfig: Reorder selects alphabeticallyFelix Singer
Change-Id: I1c438e53adc835df0a3f9436f94e0f5341cf79dd Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60358 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2021-12-28mb/google/beltino/Kconfig: Reorder selects alphabeticallyFelix Singer
Change-Id: If4ba4b2a7a358ad86b547b16a12593b912f9bd8f Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60356 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2021-12-28mb/google/jecht/Kconfig: Reorder selects alphabeticallyFelix Singer
Change-Id: I2287ae1357e0f02a42ebd770ee799613fd29c033 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60354 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2021-12-28mb/google/slippy/Kconfig: Reorder selects alphabeticallyFelix Singer
Change-Id: I7691cf37da03e6a689efcb84527ba519fe661258 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60351 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2021-12-28mb/google/butterfly/Kconfig: Reorder selects alphabeticallyFelix Singer
Change-Id: Ifc6708c2e864e5dcba12d53af24993dc173fca7f Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60350 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2021-12-28mb/google/link/Kconfig: Reorder selects alphabeticallyFelix Singer
Change-Id: I019ba38015b245f69c9663fd93775409c7d9cb1b Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60349 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2021-12-28mb/google/parrot/Kconfig: Reorder selects alphabeticallyFelix Singer
Change-Id: I7e99a44dcb512f0eb4355663cdc8dac690211dab Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60348 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2021-12-28mb/google/stout/Kconfig: Reorder selects alphabeticallyFelix Singer
Change-Id: Icd58cd466c8e85625170bb14e66fc068758883f5 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60347 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2021-12-28mb/google/rambi/Kconfig: Reorder selects alphabeticallyFelix Singer
Change-Id: I22e189dfa9b8944341aafcafe4e97dca65558937 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60346 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2021-12-28mb/google/octopus/Kconfig: Reorder selects alphabeticallyFelix Singer
Change-Id: I545a1111e24f45f732f1c325c808737dfb6bcae6 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60343 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2021-12-26mb/google/brya: Rework BOARD_GOOGLE_BASEBOARD_* KconfigSubrata Banik
Current mainboard code supports different baseboard binding example: brya uses BOARD_GOOGLE_BASEBOARD_BRYA and brask uses BOARD_GOOGLE_BASEBOARD_BRASK Kconfig. This patch makes the `BOARD_GOOGLE_BRYA_COMMON` Kconfig default `n` and specific baseboard binding Kconfig can select this Kconfig. It would also avoid adding if clause for specific baseboard binding Kconfig everytime with introduction of newer mainboard in future. TEST=Verified CONFIG_BOARD_GOOGLE_BRYA_COMMON=y while building brya and brya coreboot.rom remains the same. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I754159447e68b8ac2ea21009cc801fc5ba5df56e Reviewed-on: https://review.coreboot.org/c/coreboot/+/60379 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
2021-12-26mb/google/brya: Move PCH selection to variant configSubrata Banik
This patch ensures ADL-P PCH can get selected by mainboard variants to accommodate mainboards with ADL-N PCH in future. TEST=Able to build and boot brya without any Kconfig change. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: Ifbcd1cd7f8ecafee22d50c3f3f20decc4cc62797 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60378 Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-12-26mb/google/brya/var/taeko4es: Set vGPIO reset typeJoey Peng
Copied from commit df72b18d (mb/google/brya/var/taeko: Set vGPIO reset type).Due to the vGPIO is not reset when we power on through S5, we would met MCA when PCIE send L1 request without following Ack. BUG=b:207070967 TEST=S0->S3->S5->power key->S3->S0, see if boot up normal Signed-off-by: Joey Peng <joey.peng@lcfc.corp-partner.google.com> Change-Id: Id0df489fe5513c4975747d52c97cb3ee8e691782 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60186 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: YH Lin <yueherngl@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-12-26mb/google/guybrush/var/dewatt: update telemetry valueKenneth Chan
AMD SDLE testing had been done and apply the following telemetry settings for dewatt: vdd scale: 95359 vdd offset: 449 soc scale: 31481 soc offset: 193 BUG=b:211566312 TEST=1. emerge-guybrush coreboot 2. pass AMD SDLE test Signed-off-by: Kenneth Chan <kenneth.chan@quanta.corp-partner.google.com> Change-Id: I597a51ca599eff2abc9640aba5f3c804a686f057 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60321 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Rob Barnes <robbarnes@google.com>
2021-12-24mb/google/brya: Allow variants to choose CAR setup configurationSubrata Banik
Lists of changes: 1. Create choice config to let ADL mb variants to pick the desire CAR setup configuration between NEM and eNEM, where NEM and eNEM Kconfig have selected its required IA SoC common CAR Kconfig to able to perform the early boot configuration using CAR. 2. Lists of variants (kano, redrix, and felwinter) to drop INTEL_CAR_NEM Kconfig select and choose eNEM. 3. Default CAR configuration for ADL mb is still NEM due to still using older SoC skus without eNEM support enabled. BUG=b:168820083 TEST=Able to build and boot P2 boards using eNEM mode. Change-Id: Ibe94e6b82739ec65829859271622d904d75e978d Signed-off-by: subratabanik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59272 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
2021-12-24mb/google/drallion: Move selects from Kconfig.name to KconfigFelix Singer
Move selects from Kconfig.name to Kconfig so that the configuration is at one place and not distributed over two files. Change-Id: I4de9bc426b92d57d6aabe17cceddf6b6aa444327 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60157 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-12-24mb/google/drallion/Kconfig: Restore alphabetical order on selectsFelix Singer
Change-Id: I31df9c339821074493329f6ed8fb1559b9e1a793 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60156 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-12-24mb/google/hatch: Move selects from Kconfig.name to KconfigFelix Singer
Move selects from Kconfig.name to Kconfig so that the configuration is at one place and not distributed over two files. Change-Id: Idb7fcaaa175eb5b6e953ad0d5e2c5757d18838e4 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60155 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-12-24mb/google/hatch: Restore alphabetical order on Kconfig selectsFelix Singer
Change-Id: I6698c3882a3019e7e8f86fcb4e1c456e362d74b1 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60154 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-12-24mb/google/hatch/Kconfig: Put baseboard option before variantsFelix Singer
Align with other mainboards and put the baseboard option before the variants ones. Change-Id: I314239b6d5abd531ccdcbe4426b2c7956dc9ae45 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60153 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-12-24mb/google/sarien/Kconfig: Select board-specific options per boardFelix Singer
Move board-specific selects out of common configuration and add them to each board where necessary. Change-Id: I52c79f8958c5c40a258bcc292702154765afc476 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60152 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-12-24mb/google/sarien: Move selects from Kconfig.name to KconfigFelix Singer
Move selects from Kconfig.name to Kconfig so that the configuration is at one place and not distributed over two files. Change-Id: Ia9c59917196df8226391765f7dd7b7c5cdad1aee Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60151 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-12-24mb/google/sarien: Restore alphabetical order on Kconfig selectsFelix Singer
Change-Id: I013a6250727040c289244c31fbfbffef5ed0730b Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60150 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-12-24mb/google/reef: Drop unnecessary optionFelix Singer
Since all variants select the option `BASEBOARD_REEF_LAPTOP`, drop it and let the common baseboard option select it. Change-Id: I7f2ffd1e7b9ad2fab500b83c4cc56c9fc2d161ab Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60149 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-12-24mb/google/taniks,vell;mb/intel/adlrvp_n_ext_ec: fix build errorFelix Held
Commit d448f8ce0fe9955e7792f54cc278897152d53590 (drivers/intel/pmc_mux/ conn: Change usb{23}_port_number fields to device pointers) changed the way the pmc_mux/conn driver gets the corresponding USB ports from the devicetree. This change didn't include the corresponding change for the Taniks and Vell variants of the Google Brya project and the Intel adlrvp_n_ext_ec board which probably weren't in the tree at the time the patch referenced above was created. This patch ports the needed change forward to those boards to fix the build of the upstream tree. TEST=None Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Id295cd11fbbfe038534b154215a6de7c1ac13e0e Reviewed-on: https://review.coreboot.org/c/coreboot/+/60329 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-11 23:47:39 +0000