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2009-01-20This patch makes the recently added assembler debug optional, as it mayStefan Reinauer
cause problems with certain toolchains. This patch will also safe some hard disk space for those of us working on laptops or netbooks with always too small disks. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3876 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-12-22Fix implicit declarations of get_bus_conf.Carl-Daniel Hailfinger
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3835 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-12-22In the process of trying to debug some HT sync problems I added lots ofCarl-Daniel Hailfinger
debug code to src/northbridge/amd/amdk8/incoherent_ht.c. However, printk is not available for all boards at that stage. I have changed the following boards: agami/aruma arima/hdama asus/a8n_e broadcom/blast ibm/e325 ibm/e326 iwill/dk8s2 iwill/dk8x msi/ms7135 newisys/khepri sunw/ultra40 tyan/s2850 tyan/s2875 tyan/s2880 tyan/s2881 tyan/s2882 tyan/s2885 tyan/s2891 tyan/s2892 tyan/s2895 tyan/s4880 tyan/s4882 abuild works fine for all of them. agami/aruma needs a Config-abuild.lb which doesn't have fallback and normal due to size problems. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3829 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-12-10Use -O2 and -mcpu=p2 as romcc options for all Intel 440BX boards.Uwe Hermann
This should hopefully make the "too few registers" error pop up less often. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3810 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-11-28This patch from Ralf Grosse Boerger makes debugging more comfortable. Stefan Reinauer
With this patch it's possible to - determine the according source code line for each asm statement (objdump -dS) - determine the source code file for each asm statement (objdump -ddl) This isn't exactly trivial because cache_as_ram_auto.c gets compiled to assembly and converted by a perl script afterwards. This patch solves the problem - by extending cache_as_ram_auto.inc with debug information and line numbers - by correcting the perl calls (".text" --> "\.text") - by creating a disassembly with source code and line numbers. (ctr0.disasm and coreboot.disasm) There's one minor downside to the patch: A complete abuild run takes up around 1.6G instead of about 700MB now. But I'm sure this is quite reasonable for the benefits. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Please commit while this is being worked out. Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3778 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-11-27Remove the unnecessary memctrl[] indirection, 440BX only has oneUwe Hermann
memory controller. Also, drop some unused '#if 0' code. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3773 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-11-20OK, people, watch this.Stefan Reinauer
This is a school book example of why trivial indent patches just suck big time. This error was introduced by a trivial self-acked indent patch and was never detected (because of a missing Config-abuild.lb) So, indenting the code for no reason can make it a lot worse (read: break it) instead of improving it. I ask everyone to keep this in mind when going on indent-frenzy again. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3762 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-30Here's a patch towards r3690 upping the ROM size for the S2912 Fam10 target ↵Arne Georg Gleditsch
to 1M. Both regular and abuild images have been boot tested successfully. Signed-off-by: Arne Georg Gleditsch <arne.gleditsch@numascale.com> Acked-by: Marc Jones <marc.jones@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3711 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-13Drop unused (or commented / #if 0) reset.c files.Uwe Hermann
This is abuild-tested by me. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3654 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-12Drop tons of duplicated debug.c files, move common file toUwe Hermann
lib/debug.c and use that one. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3653 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-10Enable vga bios by default on Tyan s2881. The board has an onboard ati rage XL.Ward Vandewege
This is a trivial patch. Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3646 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-06Whitespace fixes.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3638 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-01The ARRAY_SIZE macro is convenient, yet mostly unused. Switch lots ofCarl-Daniel Hailfinger
code to use it. That makes the code more readable and also less error-prone. Abuild tested. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3624 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-18Fix whitespace in tyan s289{1,2,5} files. Also removes some #if 0 and #if 1Myles Watson
that don't seem to clarify anything. Abuild tested. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3583 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-04This changes the python generated makefilesCarl-Daniel Hailfinger
targets/*/*/Makefile targets/*/*/normal/Makefile targets/*/*/fallback/Makefile to use a common copy of romcc, and to leave this compiler untouched by 'make clean' in targets/*/*/fallback/ and targets/*/*/normal/ . 'make clean' in targets/*/*/ will clean romcc. Thanks to Mats for the initial idea and implementation of a tool to do this. This patch has almost the same behaviour as the original tool without having to run the tool each time. Tested for abuild-friendliness. The patch saves ~10-12 seconds for every target using romcc. For a full abuild run, this is ~20% time saved. For the first 38 abuild targets, total build time is down to 13m24s instead of 16m22s on my machine. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Mats Erik Andersson <mats.andersson@gisladisker.se> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3564 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-19Add Tyan S2912 platform with AMD Family 10 support. Arne Georg Gleditsch
Thanks Arne. Good job. Signed-off-by: Arne Georg Gleditsch <arne.gleditsch@numascale.com> Acked-by: Marc Jones <marc.jones@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3526 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-04-23This is the sata irq patch for s2895 and ultra40. It also changes some brokenMyles Watson
white space in the s2892 and s2891 mptable.c files. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3256 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-04-23Fix irqs for secondary ports on both sata controllers.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3255 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-04-23This patch fixes the 3 broken sata ports on the Tyan s2891 (primary port onWard Vandewege
secondary controller was ok). There were two problems: the master sata controller was not being initialized, and the irqs for the secondary ports on both controllers were not being set in the mptable. Thanks for Jonathan Kollasch for all the help figuring out the IRQ problem. While all ports work reliably under a recent kernel (2.6.24), sata is about half as fast as under the proprietary bios, according to bonnie++. That still needs fixing... Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3253 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-26This patch fixes the remaining stack protector problem on v2. The ↵Ronald G. Minnich
DISTRO_CFLAGS were not being included on the CC line for cache_as_ram_auto.c Tested on ubuntu, where formerly it failed. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Corey Osgood <corey.osgood@gmail.com> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3079 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-18Rename almost all occurences of LinuxBIOS to coreboot. Stefan Reinauer
Due to the automatic nature of this update, I am self-acking. It worked in abuild. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-18Please bear with me - another rename checkin. This qualifies as trivial, noStefan Reinauer
code is changed. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3052 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-17Enable IDE legacy port access for all 440BX based boards per default, asUwe Hermann
this is needed (at the very least) to make FILO work on these boards. Disable UDMA/33 per default, which is slower but the safe choice, as we don't know which IDE devices a user has attached, and some don't support UDMA/33 very well or at all. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3010 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-09This adds the same line (uses CONFIG_PRECOMPRESSED_PAYLOAD) to everyMyles Watson
Options.lb file that already had a "uses CONFIG_COMPRESSED_PAYLOAD_LZMA" line in it. I figure that only adding it to the files that already have support for LZMA payloads makes sure I don't break anything. Signed-off-by: Myles Watson <myles@pel.cs.byu.edu> Acked-by: Ward Vandewege <ward@gnu.org> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3002 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-13Small fix to make abuild happy (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2969 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-13Drop obsolete failover.c, forgot it in the last commit (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2961 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-13Various small fixes to make the Tyan S1846 match the format ofUwe Hermann
the other supported 440BX boards. Fix up totally b0rked static device tree in Config.lb. Drop useless and duplicated failover.c, use global one. Make CPU init actually work (result: massive speed-up). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2960 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-23The s2882 ships with a 1MB rom chip. The targets/tyan/s2882/Config.lb fileWard Vandewege
assumes a 1MB rom chip. Hence the default position for the VGA bios should also assume a 1MB rom chip, not a 512KB chip. Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2887 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-22Fix typo (trivial)Ward Vandewege
Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2886 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-22Add support for a precompressed LZMA payload (trivial).Ward Vandewege
Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2885 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07Add missing '\n' to a printk_debug() and some other small fixesUwe Hermann
while I'm at it (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2839 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-20The s2891 ships with a 1MB rom chip. The targets/tyan/s2891/Config.lb file ↵Ward Vandewege
assumes a 1MB rom chip. Hence the default position for the VGA bios should also assume a 1MB rom chip, instead of a 512KB chip. Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2792 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19Add support for a precompressed LZMA payload (trivial).Ward Vandewege
Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2787 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19Sorry, I mixed up two patches. Reverting this change.Ward Vandewege
Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2786 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19Add support for a precompressed LZMA payload (trivial).Ward Vandewege
Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2784 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-06-03Tyan S1846: Minor fixes in static device tree (trivial):Uwe Hermann
- Linux booted with the proprietary BIOS reports 2e.f as PS/2 mouse in the output of 'lspnp -v'. - The floppy on 2e.f was a typo, should have been 2e.e from the beginning. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2709 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-06-03Fix the static device tree of the Tyan S1846. Especially theUwe Hermann
Super I/O part was incorrect. Also, add ide0_enable/ide1_enable variables, and enable both the primary and secondary IDE interface per default. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2708 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-27Various 440BX and Tyan S1846 related minor changes and fixes (trivial):Uwe Hermann
- Only check the RAM from 0 - 640 KB and 768 KB - 1 MB now. That's available on all boards, regardless of what DIMMs you use. Tested on the Tyan S1846, works fine. - Properly set the PAM registers to allow the region from 768 KB - 1 MB to be used as normal RAM (required for the above). - Document all of this properly. Add/improve other documentation, too. - Simplify and document code in northbridge.c. - Cosmetics and coding style. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2701 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-19Fix typos (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2676 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-19Minor cosmetics (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2675 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-19Initialize the fans on the adt7463 chip to be dynamically regulated by theWard Vandewege
hardware, rather than always on at full speed. Set temperature treshold values to safe defaults, rather than the not-so-safe power-on defaults. Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Yinghai Lu <yinghailu@gmail.com> Acked-by: Ward Vandewege <ward@gnu.org> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2674 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-04Cosmetics (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2626 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-03Correct the RAM checking code to _not_ check the range from 640 KB - 1 MB,Uwe Hermann
as that is not RAM but used for other stuff. First try at PCI init added to src/mainboard/tyan/s1846/Config.lb. Use a real payload (FILO) per default now. Note: this cannot boot a payload, yet, but it gets a lot further now. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2623 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-04-06Trivial patch:Stefan Reinauer
* Drop empty file (0 bytes) northbridge/amd/amdk8/cpu_rev.c and references to it. * move config option decision to preprocessor instead of code since config options can not change during runtime * slightly more verbose output in built_opt_tbl.c Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2586 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-04-03Add initial framework for the Tyan S1846.Uwe Hermann
It's not fully working, among other things because the Intel 440BX northbridge isn't working, yet. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2580 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-02-27This is another fixup round for Yinghai Lu's great patch.Stefan Reinauer
It does the ROM_STREAM -> PAYLOAD rename that afaik was done after Yinghai sent his work to legal, so it is required to get that code building. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2561 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-02-19Fix some CHIP_NAME() entries to use canonical names.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2557 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-02-17Initial support for the following new mainboards:Yinghai Lu
* Nvidia l1_2pvv * Gigabyte m57sli * Supermicro h8dmr * Tyan s2912 -- with HTX The boards will currently _not_ compile, two further patches from Yinghai Lu are still missing. Please be patient :) Signed-off-by: Yinghai Lu <yinghai.lu@amd.com> Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2554 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-02-02Remove hardcoded gcc versions otherwise the build will break forUwe Hermann
most people. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2545 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-12-15Apply linuxbios-rename-other-payload-options.patchEd Swierk
(Patch 2, refs #14) Signed-off-by: Ed Swierk <eswierk@arastra.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2529 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-12-15Apply linuxbios-rename-compressed-payload-options.patch, refs #14Ed Swierk
Signed-off-by: Ed Swierk <eswierk@arastra.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2527 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-11-10* fix the automatic build system by compressing payloads if possibleStefan Reinauer
and leaving enough room for a real payload (not /dev/null) This is a wonderful example why "uses" sucks. * add Config-abuild.lb for those boards that dont build with the default settings and a real payload: arima/hdama, amd/quartet, amd/serengeti_cheetah, ibm/e326 * if lzma is installed and a real payload is used, try compressing it. * fix a small bug in "abuild --help" This patch is acked by me because its due to infrastructural changes only. Flames welcome. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2496 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-11-05Use the canonical name of the vendors/devices and theUwe Hermann
same format for all CHIP_NAME() entries in LinuxBIOS (Closes #20). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@linuxbios.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2490 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-11-02Remove some unneeded #includes from most mainboard.c files.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2485 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-27Fix the CHIP_NAME() entries of all mainboards to have the same formatUwe Hermann
and (hopefully) the correct canonical name of the vendor and board. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2476 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-06MEMCLK to DDRXXXYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2446 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-05K8_4RANK to QRANKYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2445 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-04get_bus_cong using sysconf insteadYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2442 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-04AMD Rev F supportYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2435 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-19closing issue 44: rename ram clocks in cmos.layoutStefan Reinauer
https://openbios.org/roundup/linuxbios/issue44 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2340 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-23fix compilation of s2892.Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2330 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-26fix two mainboards that have been broken by someone who does not use abuild.shStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2313 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-18co processor support with s2891Yinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2310 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-04don't wait core0 started twiceYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2295 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-03new cache_as_ram support Yinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2232 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-12-07fix type error for s2895Yinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2138 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-12-06use hcdn to simplify the mptable.c and irqtable.c --- patch fro issueYinghai Lu
48 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2136 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-12-06corrected mptable according to factory DSDTLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2135 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-12-03small update, one comment adjusted, fix epia-m abuild.Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2124 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-12-02issue 41 - fix up motherboard compilation. There's always hope.Stefan Reinauer
1201_ht_bus0_dev0_fidvid_mb.diff part 1 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2120 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-12-01Applying 11_26_car_tyan.diff from Yinghai Lu.Stefan Reinauer
NOTE: This will break the tree so it can be fixed up later git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2115 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-11-23CAR patch from YH LURonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2096 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-10-25- See Issue Tracker id-15 "lnxi-patch-15".Jason Schildt
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2078 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-10-25- See Issue Tracker id-13 "lnxi-patch-13".Jason Schildt
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2077 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-10-25- See Issue Tracker id-12 "lnxi-patch-12".Jason Schildt
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2076 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-08missed cache_as_ram_auto.cYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1983 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-08eric patchYinghai Lu
1. x86_setup_mtrr take address bit. 2. generic ht, pcix, pcie beidge... 3. scan bus and reset_bus 4. ht read ctrl to decide if the ht chain is ready 5. Intel e7520 and e7525 support 6. new ich5r support 7. intel sb 6300 support. yhlu patch 1. split x86_setup_mtrrs to fixed and var 2. if (resource->flags & IORESOURCE_FIXED ) return; in device.c pick_largest_resource 3. in_conherent.c K8_SCAN_PCI_BUS git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-62arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> add eswar code in intel car to disable Hyperthreading git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1980 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-61arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> write_pirq_routing_table for x86 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1979 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-59arch import user (historical)
Creator: Li-Ta Lo <ollie@lanl.gov> S4880 mainboard Config.lb Comment in the Config.lb shoud be '#' rather than the C++ '//'. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1977 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-56arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> remove junk in s2885 cache_as_ram_auto.c git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1974 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06cleanup due to failing tla-svn-syncarch import user (historical)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1972 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-55arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> intel car to x86 car git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1971 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-53arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> more safe stack in ram for cache_as_ram git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1969 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> cache_as_ram for AMD and some intel git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-35arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> s2881 dual core config git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1951 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-34arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> AMD D0/E0 Opteron new mem mapping support, AMD E Opteron mem hole support,AMD K8 Four Ranks DIMM support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1950 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-33arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> remove lsi/53c1030 in MB Config git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1949 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-30arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> Nvidia Ck804 support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1946 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-9arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> rm tyan VERSION git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1928 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-7arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> ide_enable in MB Config and jmp_auto ( it will make start in the 64k boundary) git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1926 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-02-03*** empty log message ***Yinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1908 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-21move apic cluster before pci_domain in MB Config.lbYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1896 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-19add config option for vgaLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1891 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-14CONFIG_PCI_ROM_RUNYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1875 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-12onboard pci romYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1858 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-10nodeidYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1849 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-07enable apic ext id to keep bsp using apid 0Yinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1847 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-07remove ti_firewire.c, it only enable the bus masterLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1845 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-05enable apic ext idYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1839 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-30 06:50:04 +0000