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2007-10-23The s2882 ships with a 1MB rom chip. The targets/tyan/s2882/Config.lb fileWard Vandewege
assumes a 1MB rom chip. Hence the default position for the VGA bios should also assume a 1MB rom chip, not a 512KB chip. Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2887 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-22Fix typo (trivial)Ward Vandewege
Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2886 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-22Add support for a precompressed LZMA payload (trivial).Ward Vandewege
Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2885 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07Add missing '\n' to a printk_debug() and some other small fixesUwe Hermann
while I'm at it (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2839 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-20The s2891 ships with a 1MB rom chip. The targets/tyan/s2891/Config.lb file ↵Ward Vandewege
assumes a 1MB rom chip. Hence the default position for the VGA bios should also assume a 1MB rom chip, instead of a 512KB chip. Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2792 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19Add support for a precompressed LZMA payload (trivial).Ward Vandewege
Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2787 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19Sorry, I mixed up two patches. Reverting this change.Ward Vandewege
Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2786 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19Add support for a precompressed LZMA payload (trivial).Ward Vandewege
Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2784 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-06-03Tyan S1846: Minor fixes in static device tree (trivial):Uwe Hermann
- Linux booted with the proprietary BIOS reports 2e.f as PS/2 mouse in the output of 'lspnp -v'. - The floppy on 2e.f was a typo, should have been 2e.e from the beginning. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2709 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-06-03Fix the static device tree of the Tyan S1846. Especially theUwe Hermann
Super I/O part was incorrect. Also, add ide0_enable/ide1_enable variables, and enable both the primary and secondary IDE interface per default. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2708 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-27Various 440BX and Tyan S1846 related minor changes and fixes (trivial):Uwe Hermann
- Only check the RAM from 0 - 640 KB and 768 KB - 1 MB now. That's available on all boards, regardless of what DIMMs you use. Tested on the Tyan S1846, works fine. - Properly set the PAM registers to allow the region from 768 KB - 1 MB to be used as normal RAM (required for the above). - Document all of this properly. Add/improve other documentation, too. - Simplify and document code in northbridge.c. - Cosmetics and coding style. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2701 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-19Fix typos (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2676 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-19Minor cosmetics (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2675 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-19Initialize the fans on the adt7463 chip to be dynamically regulated by theWard Vandewege
hardware, rather than always on at full speed. Set temperature treshold values to safe defaults, rather than the not-so-safe power-on defaults. Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Yinghai Lu <yinghailu@gmail.com> Acked-by: Ward Vandewege <ward@gnu.org> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2674 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-04Cosmetics (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2626 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-03Correct the RAM checking code to _not_ check the range from 640 KB - 1 MB,Uwe Hermann
as that is not RAM but used for other stuff. First try at PCI init added to src/mainboard/tyan/s1846/Config.lb. Use a real payload (FILO) per default now. Note: this cannot boot a payload, yet, but it gets a lot further now. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2623 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-04-06Trivial patch:Stefan Reinauer
* Drop empty file (0 bytes) northbridge/amd/amdk8/cpu_rev.c and references to it. * move config option decision to preprocessor instead of code since config options can not change during runtime * slightly more verbose output in built_opt_tbl.c Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2586 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-04-03Add initial framework for the Tyan S1846.Uwe Hermann
It's not fully working, among other things because the Intel 440BX northbridge isn't working, yet. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2580 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-02-27This is another fixup round for Yinghai Lu's great patch.Stefan Reinauer
It does the ROM_STREAM -> PAYLOAD rename that afaik was done after Yinghai sent his work to legal, so it is required to get that code building. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2561 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-02-19Fix some CHIP_NAME() entries to use canonical names.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2557 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-02-17Initial support for the following new mainboards:Yinghai Lu
* Nvidia l1_2pvv * Gigabyte m57sli * Supermicro h8dmr * Tyan s2912 -- with HTX The boards will currently _not_ compile, two further patches from Yinghai Lu are still missing. Please be patient :) Signed-off-by: Yinghai Lu <yinghai.lu@amd.com> Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2554 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-02-02Remove hardcoded gcc versions otherwise the build will break forUwe Hermann
most people. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2545 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-12-15Apply linuxbios-rename-other-payload-options.patchEd Swierk
(Patch 2, refs #14) Signed-off-by: Ed Swierk <eswierk@arastra.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2529 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-12-15Apply linuxbios-rename-compressed-payload-options.patch, refs #14Ed Swierk
Signed-off-by: Ed Swierk <eswierk@arastra.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2527 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-11-10* fix the automatic build system by compressing payloads if possibleStefan Reinauer
and leaving enough room for a real payload (not /dev/null) This is a wonderful example why "uses" sucks. * add Config-abuild.lb for those boards that dont build with the default settings and a real payload: arima/hdama, amd/quartet, amd/serengeti_cheetah, ibm/e326 * if lzma is installed and a real payload is used, try compressing it. * fix a small bug in "abuild --help" This patch is acked by me because its due to infrastructural changes only. Flames welcome. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2496 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-11-05Use the canonical name of the vendors/devices and theUwe Hermann
same format for all CHIP_NAME() entries in LinuxBIOS (Closes #20). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@linuxbios.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2490 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-11-02Remove some unneeded #includes from most mainboard.c files.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2485 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-27Fix the CHIP_NAME() entries of all mainboards to have the same formatUwe Hermann
and (hopefully) the correct canonical name of the vendor and board. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2476 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-06MEMCLK to DDRXXXYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2446 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-05K8_4RANK to QRANKYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2445 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-04get_bus_cong using sysconf insteadYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2442 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-04AMD Rev F supportYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2435 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-19closing issue 44: rename ram clocks in cmos.layoutStefan Reinauer
https://openbios.org/roundup/linuxbios/issue44 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2340 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-06-23fix compilation of s2892.Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2330 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-26fix two mainboards that have been broken by someone who does not use abuild.shStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2313 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-18co processor support with s2891Yinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2310 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-04don't wait core0 started twiceYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2295 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-03new cache_as_ram support Yinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2232 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-12-07fix type error for s2895Yinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2138 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-12-06use hcdn to simplify the mptable.c and irqtable.c --- patch fro issueYinghai Lu
48 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2136 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-12-06corrected mptable according to factory DSDTLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2135 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-12-03small update, one comment adjusted, fix epia-m abuild.Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2124 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-12-02issue 41 - fix up motherboard compilation. There's always hope.Stefan Reinauer
1201_ht_bus0_dev0_fidvid_mb.diff part 1 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2120 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-12-01Applying 11_26_car_tyan.diff from Yinghai Lu.Stefan Reinauer
NOTE: This will break the tree so it can be fixed up later git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2115 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-11-23CAR patch from YH LURonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2096 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-10-25- See Issue Tracker id-15 "lnxi-patch-15".Jason Schildt
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2078 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-10-25- See Issue Tracker id-13 "lnxi-patch-13".Jason Schildt
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2077 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-10-25- See Issue Tracker id-12 "lnxi-patch-12".Jason Schildt
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2076 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-08missed cache_as_ram_auto.cYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1983 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-08eric patchYinghai Lu
1. x86_setup_mtrr take address bit. 2. generic ht, pcix, pcie beidge... 3. scan bus and reset_bus 4. ht read ctrl to decide if the ht chain is ready 5. Intel e7520 and e7525 support 6. new ich5r support 7. intel sb 6300 support. yhlu patch 1. split x86_setup_mtrrs to fixed and var 2. if (resource->flags & IORESOURCE_FIXED ) return; in device.c pick_largest_resource 3. in_conherent.c K8_SCAN_PCI_BUS git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-62arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> add eswar code in intel car to disable Hyperthreading git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1980 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-61arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> write_pirq_routing_table for x86 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1979 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-59arch import user (historical)
Creator: Li-Ta Lo <ollie@lanl.gov> S4880 mainboard Config.lb Comment in the Config.lb shoud be '#' rather than the C++ '//'. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1977 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-56arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> remove junk in s2885 cache_as_ram_auto.c git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1974 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06cleanup due to failing tla-svn-syncarch import user (historical)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1972 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-55arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> intel car to x86 car git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1971 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-53arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> more safe stack in ram for cache_as_ram git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1969 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> cache_as_ram for AMD and some intel git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-35arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> s2881 dual core config git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1951 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-34arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> AMD D0/E0 Opteron new mem mapping support, AMD E Opteron mem hole support,AMD K8 Four Ranks DIMM support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1950 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-33arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> remove lsi/53c1030 in MB Config git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1949 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-30arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> Nvidia Ck804 support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1946 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-9arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> rm tyan VERSION git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1928 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-7arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> ide_enable in MB Config and jmp_auto ( it will make start in the 64k boundary) git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1926 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-02-03*** empty log message ***Yinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1908 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-21move apic cluster before pci_domain in MB Config.lbYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1896 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-19add config option for vgaLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1891 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-14CONFIG_PCI_ROM_RUNYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1875 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-12onboard pci romYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1858 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-10nodeidYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1849 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-07enable apic ext id to keep bsp using apid 0Yinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1847 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-07remove ti_firewire.c, it only enable the bus masterLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1845 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-05enable apic ext idYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1839 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-12-17non coherent ht chain setup automaticallyYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1824 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-12-16btext fixYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1822 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-12-03*** empty log message ***Yinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1810 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-12-03i2c mux supportYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1809 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-25marked debug device on LPC busLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1798 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-10- Don't use e7501 root_complexEric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1774 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-05*** empty log message ***Yinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1765 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-05CONFIG_CHIP_NAME to control config chip.h without .nameYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1764 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-05- Ensure every copy of Options.lb uses:Eric Biederman
CROSS_COMPILE CC HOSTCC OBJCOPY git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1755 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-05- Modify all of the Opteron motherboards to have a separate logicalEric Biederman
chip for the amdk8/root_complex git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1750 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-05*** empty log message ***Yinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1748 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-04debug device addedYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1744 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-04SI Class code checkYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1742 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-04removed #if 0 #endif codeLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1741 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-04- Update abuild.sh so it will rebuild successfull buildsEric Biederman
- Move pci_set_method out of hardwaremain.c - Re-add debugging name field but only include the CONFIG_CHIP_NAME is enabled. All instances are now wrapped in CHIP_NAME - Many minor cleanups so most ports build. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-03*** empty log message ***Yinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1736 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-02*** empty log message ***Yinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1732 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-02*** empty log message ***Yinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1731 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-02Tyan update for ROM_IMAGE_SIZE > 64KYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1730 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-28*** empty log message ***Yinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1725 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-27some more porting to the mergeStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1723 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-27spare 4s for restartYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1721 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-27S2885 winbond Superio all resource setYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1717 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-25s2735 minor changesYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1715 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-23- For now use port 0x80 based delays in for the e7501 memory initialization.Eric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1712 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-23- With Xeon cpus it seems best to use the tsc calibrated with timer2 asEric Biederman
the time source. The apic timer also has a variable time base. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1711 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-22for S2735 supportYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1708 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-21 11:58:15 +0000