coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2022-11-24	mb/system76: Reset Realtek codec before configuring	Tim Crawford
	Perform a codec reset before configuring to avoid potential issues like oryp5 had before 86f410479ca9 ("mb/system76/oryp5: Reset HDA before configuring"). Inspecting proprietary firmware for multiple boards shows that this is always done as well. Change-Id: I64c1fd23f708f77a81fad0bc889f42d4df3f6e61 Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66918 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jeremy Soller <jeremy@system76.com>
2022-08-19	mb/system76/gaze16: Move stray header to include folder	Tim Crawford
	Change-Id: Id3367a708744d6a3ed0ba69ed8e0cafe0a5934b6 Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66166 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-08-19	mb/system76/gaze16: Configure GPIOs in mainboard_init()	Tim Crawford
	Configure GPIOs in `mainboard_init()` instead of during FSP config. Change-Id: Icc40ce71d2bd104c5f41e992f9b28824a3b734d6 Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66169 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-08-19	mb/system76/gaze16: Split gpio.h into data files	Tim Crawford
	Split `gpio.h` into `gpio_early.c` for bootblock and `gpio.c` for ramstage to match other System76 boards. Change-Id: I24398ad459754ac80d92d70687ab70b22894a01c Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66168 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-08-12	mb/system76/gaze16: Rename variant dir	Tim Crawford
	Use the actual model name for the variant dir. Change-Id: I199b8efb5c3cddb8943ba4b761546caa11c67a30 Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66167 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
2022-01-25	mb/system76: Enable SrcClk pin for CPU PCIe RPs	Tim Crawford
	This reverts commit bd9b044a96cc ("mb/system76: rtd3: Remove SrcClk pin on CPU RP"). Previously, RTD3 expected a PCH index for the root port and did not work with the CPU PCIe RP present on TGL, so SrcClk pin was disabled. Set them now that RTD3 supports mapping the index for the CPU RP. Change-Id: Ia7519b9f5a2be52cd5575615c28d20371a26996b Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60914 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Jeremy Soller <jeremy@system76.com>
2022-01-14	soc/intel/tigerlake: add devicetree option PcieRpSlotImplemented	Michael Niewöhner
	Add the UPD PcieRpSlotImplemented as devicetree option. To keep the PI bit set for any slots of already existing boards, add set the option PcieRpSlotImplemented=1 where appropriate. Change-Id: Ia6f685df3c22c74ae764693329a69817bf3cd01d Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60946 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-11-11	mb/system76/gaze16: Add System76 Gazelle 16	Jeremy Soller
	https://tech-docs.system76.com/models/gaze16/README.html The gaze16 comes in 3 variants due to differences in the discrete GPU and network controller used. - NVIDIA RTX 3050, using Realtek Ethernet controller - NVIDIA RTX 3060, using Realtek Ethernet controller - NVIDIA RTX 3060, using onboard Intel I219-V Ethernet controller Tested on the 3050 variant. Tested with TianoCore (UefiPayloadPkg). Working: - PS/2 keyboard, touchpad - Both DIMM slots - M.2 NVMe SSD - M.2 SATA SSD - 2.5" SSD - All USB ports - SD card reader - Webcam - Ethernet - WiFi/Bluetooth - Integrated graphics using Intel GOP driver - HDMI output - Internal microphone - Internal speakers - Combined headphone + mic 3.5mm audio* - 3.5mm microphone input* - S3 suspend/resume - Booting to Pop!_OS Linux 21.04 and Windows 10 20H2 - Flashing with flashrom Not working: - Discrete/Hybrid graphics - Mini DisplayPort output (requires NVIDIA GPU) - 3.5mm audio input/output detection on Windows Change-Id: Ifb90f9b73a10abf53a21738e2c466d539df9a37c Signed-off-by: Jeremy Soller <jeremy@system76.com> Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56956 Tested-by: build bot (Jenkins) <no-reply@coreboot.org>