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2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
It encourages users from writing to the FSF without giving an address. Linux also prefers to drop that and their checkpatch.pl (that we imported) looks out for that. This is the result of util/scripts/no-fsf-addresses.sh with no further editing. Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/11888 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-05-21Remove address from GPLv2 headersPatrick Georgi
As per discussion with lawyers[tm], it's not a good idea to shorten the license header too much - not for legal reasons but because there are tools that look for them, and giving them a standard pattern simplifies things. However, we got confirmation that we don't have to update every file ever added to coreboot whenever the FSF gets a new lease, but can drop the address instead. util/kconfig is excluded because that's imported code that we may want to synchronize every now and then. $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, *MA[, ]*02110-1301[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 59 Temple Place[-, ]*Suite 330, Boston, MA *02111-1307[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.:Foundation, Inc.:" {} + $ find * -type f -a \! -name \*.patch \ -a \! -name \*_shipped \ -a \! -name LICENSE_GPL \ -a \! -name LGPL.txt \ -a \! -name COPYING \ -a \! -name DISCLAIMER \ -exec sed -i "/Foundation, Inc./ N;s:Foundation, Inc.* USA\.* *:Foundation, Inc. :;s:Foundation, Inc. $:Foundation, Inc.:" {} + Change-Id: Icc968a5a5f3a5df8d32b940f9cdb35350654bef9 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9233 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2014-04-13cimx/sb800 boards: Don't require ide.asl on boards without IDEEdward O'Callaghan
Not all boards which use the AMD cimx/sb800 southbridge have IDE. However, the southbridge's asl included an 'ide.asl' file which had to be present in $(mainboard_dir)/acpi. Address this issue by including ide.asl only in boards which have IDE, and remove it from all other cimx/sb800 boards. Change-Id: I57fcb4db9f85234b05ae1705ef81a576c478cee6 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/5460 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
In the file `COPYING` in the coreboot repository and upstream [1] just one space is used. The following command was used to convert all files. $ git grep -l 'MA 02' | xargs sed -i 's/MA 02/MA 02/' [1] http://www.gnu.org/licenses/gpl-2.0.txt Change-Id: Ic956dab2820a9e2ccb7841cab66966ba168f305f Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/2490 Tested-by: build bot (Jenkins) Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-12-21Supermicro H8QGI: Fix routing from 16 to 55 in ACPI tableAladyshev Konstantin
H8QGI board has 2 IO-APICS with 56 IRQ’s: IOAPIC[0]: GSI 0-23 - SB700 southbridge IOAPIC[1]: GSI 24-55 - RD890 northbridge `gDefaultApicDeviceInfoTable[]` structure in northbridge code vendorcode/amd/cimx/rd890/nbIoApic.c has IO-APIC interrupt mapping for HT and IOMMU set to last 31 IRQ pin (24+31=55). CONST APIC_DEVICE_INFO gDefaultApicDeviceInfoTable[] = { // Group Swizzling Port Int Pin {0, 0, 31}, //HT {0, 0, 31}, //IOMMU […] Also the same value (55) can be found in original Supermicro BIOS ACPI DSDT. Change-Id: Ie26da1f773716d1b7f5f5f884050ae799afc0b7e Signed-off-by: Aladyshev Konstantin <aladyshev@nicevt.ru> Reviewed-on: http://review.coreboot.org/2047 Tested-by: build bot (Jenkins) Reviewed-by: Zheng Bao <zheng.bao@amd.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-04-19Leverage the Pstate table created by AGESA.zbao
The name of processor created by AGESA is P00n, whose P is BLDCFG_PROCESSOR_SCOPE_NAME(is 'C' if it is undefined.) and n starts from 0. The dsdt should be aligned with that. This feature has only been tested on persimmon. The changes on all the other boards were propagated. Change-Id: I8c3fa4b94406d530d2bed8e9a1f42b433bbec3ec Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: zbao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/884 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-02-16Mainboard: Supermicro/h8qgi mainboard updateKerry Sheh
1. Supermicro H8QGI mainboard update to support both family10 Revison D processor and family15 model 00-0fh processor in one binary image. 2. RD890/SR56X0 IO hub CIMX wrapper support. 3. SP5100/SB700 southbridge CIMX wrapper support. Both 8 cores and 16 Cores InterLagos Opteron Processor are tested on this platform. Debian Linux 5.0 and Windows Server 2008 R2 Statdard are tested. Change-Id: Iaad8c9b08310813441188deee6797b3f6dd37d6d Signed-off-by: Kerry Sheh <kerry.she@amd.com> Signed-off-by: Kerry Sheh <shekairui@gmail.com> Reviewed-on: http://review.coreboot.org/567 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2011-07-22Add the SuperMicro H8QGI platformefdesign98
This set adds support for the SuperMicro H8QGI mainboard. It is a publicly available 4 socket board using AMD Family 10 cpus and AMD SR5650 and SB700 bridges. Change-Id: I196704f79db4c45382559c5ee0619dc8d96ff140 Signed-off-by: Frank Vibrans <frank.vibrans@amd.com> Signed-off-by: efdesign98 <efdesign98@gmail.com> Reviewed-on: http://review.coreboot.org/108 Tested-by: build bot (Jenkins) Reviewed-by: Kerry She <shekairui@gmail.com> Reviewed-by: Marc Jones <marcj303@gmail.com>