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2011-11-01Remove XIP_ROM_BASEPatrick Georgi
The base is now calculated automatically, and all mentions of that config option were typical anyway (4GB - XIP_ROM_SIZE). Change-Id: Icdf908dc043719f3810f7b5b85ad9938f362ea40 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/366 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-10-28Get rid of the old romstage-as-bootblock ROM layoutPatrick Georgi
This change removes CONFIG_TINY_BOOTBLOCK, CONFIG_BIG_BOOTBLOCK, and all their uses, assuming TINY_BOOTBLOCK=y, BIG_BOOTBLOCK=n. This might break a couple of boards on runtime, but so far, fixes were quite simple. There's a flag day: Code that relies on CONFIG_TINY_BOOTBLOCK must be adapted. Change-Id: I1e17a4a1b9c9adb8b43ca4db8aed5a6d44d645f5 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/320 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-10-13mptable: Refactor mptable generation some morePatrick Georgi
The last couple of lines of every mptable function were mostly identical. Refactor into common code, a new function mptable_finalize. Coccinelle script: @@ identifier mc; @@ ( -mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length); -mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length); -printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n", mc, smp_next_mpe_entry(mc)); -return smp_next_mpe_entry(mc); +return mptable_finalize(mc); | -mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length); -mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length); -return smp_next_mpe_entry(mc); +return mptable_finalize(mc); ) Change-Id: Ib2270d800bdd486c5eb49b328544d36bd2298c9e Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/246 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2011-10-13mptable: Get rid of fixup_virtual_wirePatrick Georgi
As stated in some code files, fixup_virtual_wire was established to avoid touching 200 invocations of the mptable code. Let Coccinelle do it: @@ type T; identifier v; @@ -void fixup_virtual_wire(T v) -{ ... } @@ expression A; identifier v; @@ -v = smp_write_floating_table(A); +v = smp_write_floating_table(A, 0); @@ expression A; identifier v; @@ -v = smp_write_floating_table(A, 0); -fixup_virtual_wire(v); +v = smp_write_floating_table(A, 1); Change-Id: Icad8a063380bf4726be7cebb414d13b574112b14 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/245 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2011-10-13mptable: Refactor lintsrc generationPatrick Georgi
We copied pretty much the same code for generating mptable entries for local interrupts (with some notable exceptions). This change moves these lines into a generic function "mptable_lintsrc" and makes use of it in many places. The remaining uses of smp_write_lintsrc should be reviewed and replaced by mptable_lintsrc calls where possible, and smp_write_lintsrc made static. This patch was generated using Coccinelle: @@ expression mc; expression isa_bus; @@ -smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, MP_APIC_ALL, 0x0); -smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, MP_APIC_ALL, 0x1); +mptable_lintsrc(mc, isa_bus); @@ expression mc; expression isa_bus; @@ -smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, isa_bus, 0x0, MP_APIC_ALL, 0x0); -smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, isa_bus, 0x0, MP_APIC_ALL, 0x1); +mptable_lintsrc(mc, isa_bus); @m@ identifier mc; expression BUS; @@ -#define IO_LOCAL_INT(type, intr, apicid, pin) smp_write_lintsrc(mc, (type), MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, BUS, (intr), (apicid), (pin)); ... -IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0); -IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1); +mptable_lintsrc(mc, BUS); Change-Id: I97421f820cd039f5fd753cb0da5c1cca68819bb4 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/244 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2011-04-20run uart_init() from console_init, just like the other console ↵Stefan Reinauer
initialization functions. Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6531 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-08Enable mahogany_fam10 and Kino family 10h to run the SB HT link at the ↵Scott Duplichan
expected HT3 frequency and width by matching the BUID swap list to the production BIOS. In addition, the BUID swap list has been moved into the project-specific file romstage.c for the other 13 AMD family 10h projects as well. For projects using a desktop AMD family 10h processor, pasting in the mahogany_fam10 swap list will likely allow HT3 operation. This should be confirmed on real hardware before commiting any swap list change. A different swap list will be needed for server projects. For serengeti_cheetah_fam10, a reference BIOS swap list to try is: 0x00, 0x0A, 0x00, 0x06, 0xFF, 0x0A, 0x06, 0xFF. The patch makes these changes: 1) Remove the BUID swap list from ht_wrapper.c and put it in each of 15 romstage.c files where it is used (AMD family 10h projects). 2) Add a prototype to amdfam10.h. 3) Modify the swap list and test in real hardware for mahogany_fam10 and kino family 10h and confirm HT3 operation for the SB link. Abuild tested. Signed-off-by: Scott Duplichan <sc...@notabs.org> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6439 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-01Use subsystem id from devicetree.cb instead of Kconfig and moveSven Schnelle
all boards to the new config scheme. Signed-off-by: Sven Schnelle <svens@stackframe.org> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6421 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-02-26Make AMD Fam10h CPU microcode updates optional in Expert modeXavi Drudis Ferran
Signed-off-by: Xavi Drudis Ferran <xdrudis@tinet.cat> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6385 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-16Get mptable OEM/product ID from kconfig variables.Uwe Hermann
We currently use "COREBOOT" unconditionally as the "OEM ID" in our mptable.c files, and hardcode the mainboard name in mptable.c like this: mptable_init(mc, "DK8-HTX ", LAPIC_ADDR); However, the spec says "OEM ID: A string that identifies the manufacturer of the system hardware." (Table 4-2, page 42) so "COREBOOT" doesn't match the spec, we should use the hardware vendor name. Thus, use CONFIG_MAINBOARD_VENDOR which we have already as the "OEM ID" (truncate/fill it to 8 characters as per spec). Also, use CONFIG_MAINBOARD_PART_NUMBER (the board name) as "product ID", and truncate/fill it to 12 characters as per spec, if needed. Abuild-tested. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6183 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-15Cleanup up HD audio codec / hda_verb.h files.Uwe Hermann
Most of the current hda_verb.h files are identical (same MD5 sum) and are intended for a specific MCP55 board with the Realtek ALC880 audio codec, which has the vendor/device ID of 0x10ec0880. They were splitted out from the MCP55 southbridge code and put into board dirs a long time ago (which is correct, as those settings are indeed board-specific), but they were never adapted to those boards. Here's the table of which codec is soldered onto which board, based on checking the vendor website board spec pages, and the board manuals: - GIGABYTE GA-M57SLI-S4: Realtek ALC883 - MSI MS-7260: Realtek ALC883 - MSI MS-9652: Realtek ALC888 - MSI MS-9282: Server board, doesn't have audio at all - Tyan S2912: Server board, doesn't have audio at all - All Supermicro boards: Server boards, don't have audio at all - NVIDIA l1_2pvv: No public info to be found, but I assume this was the original MCP55 eval board for the port and it's probably has the Realtek ALC880 codec used in the original hda_verb.h. These are the codec vendor device/IDs involved: Realtek ALC880: 0x10ec0880 Realtek ALC883: 0x10ec0883 Realtek ALC888: 0x10ec0888 The following files are marked as incorrect / TODO, as the ID of the codec doesn't match and thus will never get actually used (you'll see "HDA: no verb!" or similar in the coreboot logs). Even if the ID matched, the rest of the table would be incorrect anyway because the values are highly board-specific. ./src/mainboard/gigabyte/m57sli/hda_verb.h ./src/mainboard/msi/ms9652_fam10/hda_verb.h ./src/mainboard/msi/ms9282/hda_verb.h The following files can be safely dropped as these are server boards and don't have HD audio (or other audio) at all: ./src/mainboard/supermicro/h8dmr/hda_verb.h ./src/mainboard/supermicro/h8qme_fam10/hda_verb.h ./src/mainboard/supermicro/h8dme/hda_verb.h ./src/mainboard/supermicro/h8dmr_fam10/hda_verb.h ./src/mainboard/tyan/s2912/hda_verb.h ./src/mainboard/tyan/s2912_fam10/hda_verb.h The following two are correct and can stay: ./src/mainboard/nvidia/l1_2pvv/hda_verb.h ./src/mainboard/getac/p470/hda_verb.h Abuild-tested. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Stefan Reinauer <stepan@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6180 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-08Move "select CACHE_AS_RAM" lines from boards into CPU socket.Uwe Hermann
All K8/Fam10h boards use CAR, so move the "select CACHE_AS_RAM" into the socket directories, and remove it from the individual boards. Do the same for Intel CPUs/sockets where all boards use CAR. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6151 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-08second round name simplification. drop the <component>_ prefix.stepan
the prefix was introduced in the early v2 tree many years ago because our old build system "newconfig" could not handle two files with the same name in different paths like /path/to/usb.c and /another/path/to/usb.c correctly. Only one of the files would end up being compiled into the final image. Since Kconfig (actually since shortly before we switched to Kconfig) we don't suffer from that problem anymore. So we could drop the sb700_ prefix from all those filenames (or, the <componentname>_ prefix in general) - makes it easier to fork off a new chipset - makes it easier to diff against other chipsets - storing redundant information in filenames seems wrong Signed-off-by: <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick@georgi-clan.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6150 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-08first round name simplification. drop the <component>_ prefix.stepan
the prefix was introduced in the early v2 tree many years ago because our old build system "newconfig" could not handle two files with the same name in different paths like /path/to/usb.c and /another/path/to/usb.c correctly. Only one of the files would end up being compiled into the final image. Since Kconfig (actually since shortly before we switched to Kconfig) we don't suffer from that problem anymore. So we could drop the sb700_ prefix from all those filenames (or, the <componentname>_ prefix in general) - makes it easier to fork off a new chipset - makes it easier to diff against other chipsets - storing redundant information in filenames seems wrong Signed-off-by: <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick@georgi-clan.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6149 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-06Winbond W83627HF: Use existing functions instead of open-coding.Uwe Hermann
Use w83627hf_set_clksel_48() where needed instead or open-coding the same functionality, and also use w83627hf_enable_serial() instead of w83627hf_enable_dev() (which does exactly the same, but isn't wrapped in the enter/exit config mode functions). Abuild-tested. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6143 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-25MCP55: Add TINY_BOOTBLOCK support.Uwe Hermann
Also, move CONFIG_HT_CHAIN_END_UNITID_BASE #ifdef block to mcp55.h to make the build work (but this is a good idea anyway, as it's used in multiple files). Abuild-tested. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6123 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-22Final set of smp_write_bus -> mptable_write_buses changes.Patrick Georgi
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Acked-by: Patrick Georgi <patrick@georgi-clan.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6114 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-21Simplify a few code chunks, fix whitespace and indentation.Uwe Hermann
Also, remove some less useful comments, some dead code / unused functions. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6108 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-21Drop excessive whitespace randomly sprinkled in romstage.c files.Uwe Hermann
Also drop some dead or useless code snippets. Abuild-tested. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6107 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-21Move MCP55_PCI_E_X_* to Kconfig. Any useless values in romstage.cs werePatrick Georgi
not brought over to Kconfig (this applies to all #defines to 4, as that's the default anyway) Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6104 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-20Merge all spd_addr.h into the resp. romstage.c files.Uwe Hermann
Except for one instance the spd_addr.h were now very tiny, there's not much point in keeping that stuff in an extra file. The only user of those files is the romstage.c file anyway. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6101 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-20Some more DIMM0 related cleanups and deduplication.Uwe Hermann
- VIA VT8235: Do the shift in smbus_read_byte() as all other chipsets do. - spd.h: Move RC00-RC63 #defines here, they were duplicated in lots of romstage.c files and lots of spd_addr.h files. Don't even bother for those spd_addr.h which aren't even actually used, drop them right away. - Replace various 0x50 hardcoded numbers with DIMM0, 0x51 with DIMM1, and 0xa0 with (DIMM0 << 1) where appropriate. - Various debug.c files: Replace SMBUS_MEM_DEVICE_START with DIMM0, SMBUS_MEM_DEVICE_END with DIMM7, and drop useless SMBUS_MEM_DEVICE_INC. - VIA VX800: Drop unused SMBUS_ADDR_CH* #defines. - VIA VT8623: Do the shift in smbus_read_byte() as all other chipsets do. Then, replace 0xa0 (which now becomes 0x50) with DIMM0. - alix1c/romstage.c, alix2d/romstage.c: Adapt to recent bit shift changes. - Various files: Drop DIMM_SPD_BASE and/or replace it with DIMM0. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Patrick Georgi <patrick@georgi-clan.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6100 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-18Fix/drop some obsolete comments,Uwe Hermann
- s/Options.lb/devicetree.cb/ - s/Config.lb/devicetree.cb/ - s/cache_as_ram_auto.c/romstage.c/ - h8dmr_fam10/README: Drop obsolete comment, we have mc_patch_01000086.h in the tree now. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6095 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-18Eliminate SET_NB_CFG_54 option. There was no board thatPatrick Georgi
deselected it, and very likely there won't ever be any hardware that requires it deselected. Keep the "selected" code path around, leading to no functional change. Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Acked-by: Scott Duplichan <scott@notabs.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6086 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-16Move the SET_FIDVID* family of configuration options to Kconfig andPatrick Georgi
make their defaults more obvious. Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Acked-by: Stefan Reinauer <stepan@coreboot.org> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6077 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-14CK804/MCP55 devicetree.cb cosmetic and indentation fixes.Uwe Hermann
Add a few more comments for the entries, and also change the devicetree.cb files to the more compact and better readable variant with indentation level of 2 spaces (instead of random mix of tabs and spaces). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6071 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-05Move QRANK_DIMM_SUPPORT to Kconfig, removing it from romstage.cPatrick Georgi
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6028 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-26We need to call smp_write_lintsrc() instead of smp_write_intsrc() forTobias Diedrich
local ints. This is wrong in most coreboot mptables, probably all generated by util/mptable/mptable.c. After fixing this now XP can boot in MPS mode on my M2V. Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5992 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-25Factor out common mptable code to mptable_init().Uwe Hermann
- Drop sig[], oem[], and productid[] fields in all mptable.c files, no longer needed. The sig[] is always the same ("PCMP"), the oem[] is currently also always the same ("COREBOOT"), and productid is being passed into mptable_init() directly as string now. - LAPIC_ADDR is passed in as parameter, too. While at the moment it's always the same value that is passed in, the LAPIC base address could also be relocated theoretically, so keep it as parameter for now. - Fix a few productid entries, they were (partially) incorrect: - DK8S2 (was "DK8X", copypaste) - 939A785GMH (was "MAHOGANY", copypaste) - X6DHE-G (was "X6DHE", incomplete board name) - H8DME-2 (was "H8DMR", copypaste) - H8QME-2+ (was "H8QME", incomplete board name) - X6DHE-G2 (was "X6DHE", incomplete board name) - X6DHR-iG2 (was "X6DHR-iG", incomplete board name) - GA-M57SLI-S4 (was "M57SLI", incomplete board name) - KINO-780AM2 (was "KINO", incomplete board name) - DL145 G1 (was "DL145G1", small fix as per vendor website) - DL145 G3 (was "TREX", wrong board name) - DL165 G6 (was "HP DL165 G6", drop vendor) - S2912 (was "S2895", copypaste) - VT8454c (was "VIA VT8454C", drop vendor, lower-case "c") - EPIA-N (was "P4DPE", copypaste) - pc2500e (was "PC2500", incorrect name) - S1850 (was "S2850", copy-paste) - MS-7135 (was "MS7135") - MS-9282 (was "MS9282") - MS-9185 (was "MS9185") - MS-9652 (was "K9ND MS-9652") - Ultra 40 (was "ultra40") - E326 (was "E325", copypaste) - M4A785-M (was "TILAPIA", copypaste) - P2B-D (was "ASUS P2B-D", drop vendor) - P2B-DS (was "ASUS P2B-DS", drop vendor) - Adapt the mptable utility to use mptable_init() too. Abuild-tested. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5987 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-07Remove duplicate line from pci_ids.h.Jonathan Kollasch
Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net> Acked-by: Jonathan Kollasch <jakllsch@kollasch.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5920 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-05attached patch moves a couple more config flags out of romstage:Patrick Georgi
CK804_USE_NIC, CK804_USE_ACI, CK804_NUM. MCP55_USE_NIC, MCP55_USE_ACI, MCP55_NUM. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> Acked-by: Pter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5912 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-10-05Remove lib/ramtest.c-include from all CAR boards.Patrick Georgi
Remove many more .c-includes from i945 based boards. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5910 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-28Remove redundant HW_MEM_HOLE_SIZEK and HW_MEM_HOLE_SIZE_AUTO_INC settings.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5875 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-10Move memory type information out of some AMD sockets.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5800 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-30We call this cache as ram everywhere, so let's call it the same in KconfigStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5756 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-30Restructured all vendors' Kconfig files to no longer source the boards'Jens Rottmann
Kconfigs from within the choice/endchoice block. This makes it possible to define user visible board specific options. Moved all vendor names and PCI ids to the vendors' Kconfigs. Now all options in each file depend on the same symbol, so replaced all "depends on"s with a single "if". Sorted boards (sort -d), cleaned whitespace. This patch also introduces a dummy option BOARD_SPECIFIC_OPTIONS, which is always "y" and never used. It it simply needed to have something to attach the boards' "select" statements to. Signed-off-by: Jens Rottmann <JRottmann@LiPPERTEmbedded.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5754 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-26Remove unused mainboard_config definitions. Trivial.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5744 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-14My old mcp55 azalia fix from May 2010. Was never checked in.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5695 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-03Drop the USE_PRINTK_IN_CAR option. It's a bogus decision to make for any user /Stefan Reinauer
board porter: printk should always be available in CAR mode. Also drop CONFIG_USE_INIT, it's only been selected on one ASROCK board but it's not been used there. Very odd. There is one usage of CONFIG_USE_INIT which was always off in src/cpu/intel/car/cache_as_ram.inc and we have to figure out what to do with those few lines. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5682 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-07-06Re-integrate "USE_OPTION_TABLE" code.Edwin Beasant
Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com> Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5653 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-20Move generation of mptable entries for ISA to generic code.Patrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5575 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-14Remove another set of includes from Fam10 romstages:Patrick Georgi
northbridge/amd/amdht/ht_wrapper.c northbridge/amd/amdfam10/raminit_amdmct.c cpu/amd/model_10xxx/fidvid.c pc80/mc146818rtc_early.c They are now included by the fam10 chipset code that requires them. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5548 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-08Drop console/console.c and pc80/serial.c from mainboards'Patrick Georgi
romstage.c. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5528 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-05-05Rename "apic" and "apic_cluster" to "lapic" and "lapic_cluster"Patrick Georgi
in device trees. Adapt sconfig as necessary. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5525 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-04-27Since some people disapprove of white space cleanups mixed in regular commitsStefan Reinauer
while others dislike them being extra commits, let's clean them up once and for all for the existing code. If it's ugly, let it only be ugly once :-) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-04-25try to unify timing initialization across those boards that need it...Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5496 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-04-16zero warnings days: unify mp tables. fix warnings.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5448 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-04-15remove more warnings. move ROOT_COMPLEX selection to fam10Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5447 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-04-15Remove a few more warnings from fam10.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5440 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-04-14zero warning days. Move RAMTOP and RAMBASE together.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5435 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-04-14drop quite a lot of dead code that did nothing but produce warnings and makeStefan Reinauer
the rest of the code unreadable. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5426 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-04-09copy_and_run.c is not needed twice, and it is used on non-car too.Stefan Reinauer
So move it to src/arch/i386/lib/cbfs_and_run.c Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5387 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-04-08Clean up fidvid files using indent.Myles Watson
Remove some special print statements. In general, make them easier to compare. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-04-08Replace dual_core and quad_core CMOS (nvram) options with multi_core. Fix ↵Myles Watson
some white space. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5380 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-04-07move amd K8/Fam10 "bus detection" function prototypes to a common place.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5370 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-04-07- unify use of SB_HT_CHAIN_UNITID_OFFSET_ONLYStefan Reinauer
- cleanup reset - some minor warning fixes. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5361 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-31This patch drops arch/i386/lib/console.c and arch/i386/lib/console_print.c andStefan Reinauer
makes include/console/console.h and console/console.c usable both in __PRE_RAM__ and coreboot_ram stages. While debugging this, I removed an indirection from the e7520 ram init code (same as we did on a couple of other chipsets, removes some register pressure from romcc) Also, drop remainders of CONFIG_USE_INIT (except the one odd piece of dead code in cache_as_ram.inc) Then some ap_romstage.c fixes, at least the nvidia/l1_2pvv compiled for me with CONFIG_AP_CODE_IN_CAR set in Kconfig which it did not before. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5341 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-30- drop unneeded Makefile.incStefan Reinauer
- drop ap_romstage from Fam10 boards, the mechanism was never used on Fam10 Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5333 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-30drop USE_INIT from mainboard Kconfig files, it's already set in src/KconfigStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5331 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-30unify cmos.layout wrt AMD extended configuration registers.Stefan Reinauer
This removes double preprocessor define warnings from many boards. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5323 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-29This drops the ASSEMBLY define from romstage.c, tooStefan Reinauer
(since it's not assembly code, this was a dirty hack anyways) Also run awk 1 RS= ORS="\n\n" < $FILE > $FILE.nonewlines mv $FILE.nonewlines $FILE on romstage.c because my perl -pi -e 's,#define ASSEMBLY 1,,g' */*/romstage.c cut some holes into the source. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5320 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-29__PRE_RAM__ is now correctly specified in the Makefile. No need to hack it intoStefan Reinauer
romstage.c anymore Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5315 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-29This patch drops the coreboot CMOS checksum ranges from Kconfig becauseStefan Reinauer
the information is already specified in cmos.layout. coreboot is changed to use that version instead. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmai.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5313 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-29dualcore.h and quadcore.h are almost exactly the same. Stefan Reinauer
Only have multicore.h for both of them. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5311 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-28drop unneeded __ROMCC__ checks when the check for __PRE_RAM__ is moreStefan Reinauer
appropriate. Also, factor out post_code() for __PRE_RAM__ code and drop it from some mainboards. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5307 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-22Fix all the format string warnings.Myles Watson
Some other random warnings. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5268 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-22printk_foo -> printk(BIOS_FOO, ...)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5266 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-18Remove remaining uses ofPatrick Georgi
HAVE_FAILOVER_BOOT HAVE_FALLBACK_BOOT USE_FAILOVER_IMAGE USE_FALLBACK_IMAGE Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5259 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-18Rework boolean expression (DeMorgan and all) forPatrick Georgi
better readability. Also remove failover.c files in mainboards, as they're not used anymore (and useless, too) Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5258 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-17Remove failover/fallback/normal handling in mainboards'Patrick Georgi
romstage.c. That's newconfig stuff. 1. In failover_process(), I removed the fallback/normal selection logic and kept the remaining hardware init in. The if-clauses' conditions are reverted to match. Remove #if failover||fallback guard. 2. Change cache_as_ram_main() to first call failover_process, then real_main unconditionally. 3. Move failover_process's code to the beginning of real_main, remove failover_process and its call in cache_as_ram_main. 4. Remove cache_as_ram_main, rename real_main to cache_as_ram_main (same arguments, so no problem with that) Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5255 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-11Replace clear_memory with memset.Myles Watson
Replace set_init_ram_access with the call to set_var_mtrr. Remove unused #include statments. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5201 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-28- Add config flag for boards that have their own fadt.cPatrick Georgi
This should eventually go, as fadt seems to be better put into the southbridge - Add config flag for boards that have get_bus_conf.c Might be cleaned out as well, no idea - Use flags where appropriate. - Move the following rules to src/arch/i386/Makefile.inc: - fadt.o - dsdt.o - acpi_tables.o - get_bus_conf.o - Rename objs_dsl_template in toplevel Makefile to the more appropriate objs_asl_template - Remove all Makefiles that are empty now, which includes src/mainboard/Makefile.k8_CAR.inc and src/mainboard/Makefile.k8_ck804.inc and the include statements that used these files. - Add workaround to intel/xe7501devkit: It uses ACPI in an unusual way: It adds a MADT, but no DSDT. As this is highly unusual, I didn't want to add explicit support for that scenario (and encourage such uses that way), and added a dummy dsdt.asl instead. It will be linked to dsdt.o, but not linked into the final binary. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5171 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-27- make HAVE_HARD_RESET match what newconfig didPatrick Georgi
- introduce BOARD_HAS_HARD_RESET and use it if a board provides hard_reset in $(MAINBOARDDIR)/reset.c, instead of some chipset component - move a couple of rules out of the mainboards' Makefiles into src/arch/i386/Makefile.inc: initobj-y += crt0.o obj-y += mainboard.o obj-$(CONFIG_GENERATE_MP_TABLE) += mptable.o obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o obj-$(CONFIG_BOARD_HAS_HARD_RESET) += reset.o - remove Makefile.incs that are empty (or comment-only) after these changes, incl. Makefile.romccboard.inc (and references to it) - Make include not fail if Makefile.inc doesn't exist. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5168 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-25Move the ldscripts logic to src/arch/i386/Makefile.incPatrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Joseph Smith <joe@settoplinux.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5164 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-25Unify crt0s setup to src/arch/i386/Makefile.inc. This variablePatrick Georgi
is not something users have to concern themselves with anymore. Also fixes some wrong romstrap configs for boards, fixing a couple of them. Also add "make printcrt0s" target for debugging crt0s when updating modified checkouts. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5162 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-23Only handle code as "driver" that actually uses our driverPatrick Georgi
infrastructure (special linking, data structures, etc) Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5150 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-15Various license header consistency fixes (trivial).Uwe Hermann
- Consistently use the same wording and formatting for all license headers. - Remove useless whitespace, add missing whitespace, fix indentation. - Add missing "This file is part of the coreboot project." where needed. - Change "(C) Copyright John Doe" to "Copyright (C) John Doe" for consistency. - Add some missing "(C)" strings and copyright years where needed. - Move random comments and file descriptions out of the license header. - Drop incorrect file descriptions completely (e.g. lpc47m10x/Makefile.inc). There should be no changes in _content_ of the license headers, if you spot such changes that's a bug, please report! Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5127 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-09Move all the copies of the romstage.inc rule toPatrick Georgi
src/arch/i386/Makefile.inc For that to work, I had to: - Add a CONFIG_ROMCC variable - Set that variable on all ROMCC boards - conditionally choose romcc or gcc rule based on that variable - remove those two rules from all the boards' Makefiles - switch a couple of boards to HAVE_OPTION_TABLE, as they actually have. Also remove the duplication of rules with the sole difference of if they depend on option_table.h or not. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5099 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-08Clean up ACPI:Patrick Georgi
- unify all iasl related rules into the toplevel Makefile - build a filesystem standard for ACPI files and use it - pass ACPI sources through cpp, so constants can be shared between C and ACPI more easily - use cpp's #include instead of ACPI's Include() so cpp gets the whole picture Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5094 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-08straighten naming scheme for application processor rom stage files.Stefan Reinauer
Apparently they are not used. If you have any of the boards touched in this commit, please test and report (so we can figure out what to do with the ap_romstage.c files in general) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5093 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-08janitor task: unify and cleanup naming.Stefan Reinauer
cache_as_ram_auto.c and auto.c are both called "romstage.c" now. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5092 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-07newconfig is no more.Patrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5089 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-30* fix crt0s/ldscripts paths to fix out of tree build.Stefan Reinauer
* fix iasl output directory for i945 boards (patch for moving it to the mainboard directory will follow) * coreboot_table.c: lb_mainboard can be static * coreboot_table.c: dump memory table in debug and spew mode * fix a warning in bootblock.c * don't include arch/i386/init in arch/i386/Makefile.inc * announce generation of crt0_includes.h * allow overriding $(obj) * drop unused src_types from Makefile * correctly use hostname -s instead of hostname for COMPILE_HOST Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5065 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-25More Kconfig changes to improve match with newconfig:Patrick Georgi
DIMM_SUPPORT APIC_ID_OFFSET ACPI_SSDTX_NUM IRQ_SLOT_COUNT MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID (except msi/ms9185) MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID MEM_TRAIN_SEQ HAVE_ACPI_RESUME Also remove MMX (kconfig specific) and HAVE_MOVNTI and IOAPIC (which we deliberately differ in kconfig) from compareboard report. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5052 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-18Move all IOAPIC selection to southbridges, and remove themPatrick Georgi
from mainboards. Some adaptations were necessary after the IOAPIC cleanup, so this should fix the build. Fix intel/d945gclf build, which was missing some ACPI component. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5039 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-06Kconfig builds all boards now.Patrick Georgi
This patch also aligns the configuration of a couple of boards more closely to what newconfig does. Also, the romstrap inc/lds files are declared in the Makefiles of the southbridges they belong to, instead of some global file. AMD CPUs have their own timer functions, so disable UDELAY_IO for them and set HAVE_INIT_TIMER as appropriate, same for emulation/qemu-x86. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5000 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-27Eliminate special case id.inc/id.lds in favor of a configuration variable ↵Patrick Georgi
ID_SECTION_OFFSET which is normally set to 0x10 (the current default) and set to 0x80 (the current alternative) where necessary (if romstraps get in the way). For Kconfig, the special case is set per southbridge (as these define the necessity for this workaround), for newconfig it's added to each single board. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4962 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-06Remove drivers/pci/onboard. The only purpose was for option ROMs, which areMyles Watson
now handled more generically using CBFS. Simplify the option ROM code in device/pci_rom.c, since there are only two ways to get a ROM address now (CBFS and the device) and add an exception for qemu. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4925 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-06Drop all pre-CBFS rom_address entries in Config.lb/devicetree.cb.Uwe Hermann
Since we have CBFS setting rom_address in board files is no longer necessary. Also, drop vga_rom_address from RS690 completely, it was never used in the code. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4923 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-06Split the two usages of __ROMCC__:Myles Watson
__ROMCC__ now means "Don't use prototypes, since romcc doesn't support them." __PRE_RAM__ means "Use simpler versions of functions, and no device tree." There are probably some places where both are tested, but only one is needed. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4921 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-26Define some variables that were not defined. There are a couple left.Myles Watson
Do kbuildall then grep not.defined kbuildall.results/* The interesting ones were GENERATE_* I had to put them in twice to make it work correctly: once outside the menu setting the defaults, and once inside the menu. Now they show up when they should, and are always defined Define HAVE_INIT_TIMER to only exclude the three boards that define it to be 0 in newconfig. Define MEM_TRAIN_SEQ to be an integer and set it correctly. Remove CAR_FAM10 and just depend on NORTHBRIDGE_AMD_AMDFAM10 MOVNTI is a performance enhancement, and should default to 0 so it doesn't break boards that forget to define it. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4856 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-24Major cleanups of the hard_reset() code and config in coreboot.- supermicro/x6dhe_g/auto.c
- Drop unused "#object reset.o" entries. - Use CONFIG_HAVE_HARD_RESET for all "object reset.o" entries. - Drop dead/commented code, i.e. useless hard_reset() from: - supermicro/x6dhe_g/auto.c - supermicro/x6dhe_g2/auto.c - supermicro/x6dhe_g2/auto.updated.c - supermicro/x6dhr_ig/auto.c - supermicro/x6dhr_ig2/auto.c - digitallogic/msm586seg/auto.c - dell/s1850/auto.c - Add "obj-$(CONFIG_HAVE_HARD_RESET) += reset.o" to kconfig files of boards that actually have a reset.c file. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4849 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-20Remove CONFIG_CPU_AMD_FAM10 & CONFIG_CPU_AMDK8 from mainboards. They should beMyles Watson
selected in sockets, and they aren't used yet. Add a couple of variables to src/Kconfig for lack of a better place so that their selects work. Add select statements according to newconfig for some variables that were defined but never selected in mainboard configs. Fix #if CONFIG_VGA==1 -> #if CONFIG_VGA. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4816 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-20Fix all board names in Kconfig as per wiki / vendor website.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4815 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-16Set default ROM sizes per-board to match the ROM chip that cameUwe Hermann
with the respective board. Of course, the user can still override the size in menuconfig. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4790 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-16Change CONFIG_LB_MEM_TOPK to CONFIG_RAMTOP to match CONFIG_RAMBASE.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4788 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-15Add CONFIG_GENERATE_* for tables so that the user can select which tables notMyles Watson
to build, but by default all the tables that are available are built. Make PIRQ table build for qemu. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4778 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-09Remaining boards are Kconfig'd now. Whether they workPatrick Georgi
or not still depends on how close the configuration options are to what they should be. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4751 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-04This does away with CONFIG_ROM_PAYLOAD_START and CONFIG_PAYLOAD_SIZE.Patrick Georgi
Both were only really used in pre-cbfs, as the payload's size isn't relevant for the build process anymore. Various calculations in {no,}failovercalculation.lb are adapted accordingly. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4720 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-03Remove:Patrick Georgi
- CONFIG_CBFS - anything that's conditional on CONFIG_CBFS == 0 - files that were only included for CONFIG_CBFS == 0 In particular: - elfboot - stream boot code - mini-filo and filesystems (depends on stream boot code) After this commit, there is no way to build an image that is not using CBFS anymore. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4712 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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