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path: root/src/mainboard/starlabs/starlite_adl
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2024-10-11mb/starlabs/*: Rework the performance profilesSean Rhodes
Rather than hardcoded values, simply change these to -25% of the defaults for Power Saving, and +25% for Performance. Change-Id: I16aeb4d5dc25a3f240a775509276c9d3189e9699 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84661 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-10-11mb/starlabs/*: Adjust the scope of PTTSean Rhodes
The Windows driver only checks PCI0, so move the window accordingly so that it can be used. Tested on `starlite_adl` by booting Windows 11 installation medium. Prior to this patch, it would flag that the security requirements were not met - it now happily installs. Change-Id: I5d0d062502af99104690f9a9affec09f42b5bc71 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84663 Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2024-10-11mb/starlabs/*: Set PL4 to 1.0C of the batterySean Rhodes
Override the PL4 to the maximum power the battery can provide without a charger connected to prevent drawing too much power. Change-Id: I2945e1ed0f33ab6692631e327c1457980b353c06 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84660 Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-10-11mb/starlabs/starlite_adl: Correct the SOC definition in devtreeSean Rhodes
The wrong definition was used, so the code had no effect. The ID for the processor used is `b06e0`. Change-Id: I36e13074a77b93871c1d86664e35a33afe39a402 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84659 Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-10-11mb/starlabs/*: Enhance USB configuration and commentsSean Rhodes
Some boards use hubs for devices, so correct the ACPI configuration for these ports. Also, add more information to the comments for the ports. Change-Id: I8472130aba8e777557cf68280fa0058dbeb77df9 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84650 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
2024-10-11mb/starlabs/starlite_adl: Make I2C speed configurableSean Rhodes
Make the I2C speed user configurable from CMOS. Both the touchscreen and accelerometer support running at 100MHz or 400MHz. They perform better at 400MHz but use more power - this patch lets the user choose. Change-Id: Ia1b08d7ec6212418bb95d0a52077f01c930f8830 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83882 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
2024-10-11mb/starlabs/starlite_adl: Alphabetize and group FSP UPDsSean Rhodes
Change-Id: Ibe47f242ce12fc4906baeee89393a34a56eaca76 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83881 Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-10-10mb/starlabs/*: Disable c6dramSean Rhodes
None of these boards support or use S0ix so c6dram isn't needed, so disable it. Change-Id: I8124899a1f7ce20442f28919f7315ee7e52355e5 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84632 Reviewed-by: Maxim <max.senia.poliak@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-10-10mb/starlabs/starlite_adl: Adjust the configuration for USB 2 Port 2Sean Rhodes
Port 2 is a hub, used for the internal keyboard and the card reader. Adjust this to a hub. Change-Id: I3a9b9e6803934291b46fb502ff1b3b088c047703 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84641 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Maxim <max.senia.poliak@gmail.com>
2024-10-10mb/starlabs/starlite_adl: Add PLD groups to USB ACPI configurationSean Rhodes
Change-Id: I8ea01c21ec03c11e9599684dbe51d103c07c172a Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84640 Reviewed-by: Maxim <max.senia.poliak@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-10-10mb/starlabs/starlite_adl: Reconfigure the touchscreenSean Rhodes
The existing GPIO configuration was IRQ heavy; tweak this to reduce the number of interrupts. Change-Id: I6d23bea5ec12e86a3606186edb29636540283fa3 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84639 Reviewed-by: Maxim <max.senia.poliak@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-10-10mb/starlabs/starlite_adl: Adjust the PROCHOT GPIOSean Rhodes
A debug configuration was left in the patch when it was uploaded, remove this. Change-Id: I3ab8137d3841dfa200750a97969af5dca477d7e2 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84638 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Maxim <max.senia.poliak@gmail.com>
2024-10-10mb/starlabs/starlite_adl: Configure Wireless GPIOs laterSean Rhodes
The wireless GPIOs don't need to be configured in the bootblock, so set them up in ramstage. Change-Id: Iab399884edde29891e66ffc097cf6f3dff71c351 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84637 Reviewed-by: Maxim <max.senia.poliak@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-10-07mb/*: Explicitly include static.h for config_of_socNicholas Chin
As per commit 865173153760 ("sconfig: Move config_of_soc from device.h to static.h"), sources that require access to the devicetree should directly include static.h so that it can be removed from device.h, eliminating unnecessary dependencies on static.h for files that only need the types and function declarations in device.h. Change-Id: Ia793666fda47678764fd33891fddb4aecf207bd4 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84588 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Jayvik Desai <jayvik@google.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2024-10-03mb/starlabs/{lite_adl,byte_adl}: Don't select MAINBOARD_HAS_TPM2Sean Rhodes
This isn't required by these boards as they both use PTT. Change-Id: I66b3f614914e51116f3cabe457205fb6b3528387 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84629 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-10-03mb/starlabs/*: Don't disable Turbo Boost in Power Saver profileSean Rhodes
Tested on 24.04, disabling Turbo Boost increases power consumption which doesn't align with the aim of the Power Saver profile. Change-Id: I19e8189ee6c44d19bf222c921429284ed1e1aa2a Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84628 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-09-01tree: Use eist_enable as bool for newly merged filesElyes Haouas
Change-Id: Icc01852dc5bd04cfa151e8fa7c5bcc160ed978c6 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84156 Reviewed-by: Sean Rhodes <sean@starlabs.systems> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-08-11tree: Use boolean for pch_hda_sdi_enable[]Elyes Haouas
Change-Id: I27568d1205216f697b48ffb09ce5208505718978 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83863 Reviewed-by: Dinesh Gehlot <digehlot@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-08-07mb/starlabs/starlite_adl: Remove has_cdm from devicetreeSean Rhodes
The property `has_cdm` only existed in an early patchset, the version that was merged only requires `cdm_index` so remove the former that was added in c6c75dfbaeff208c17bb47fdede855286e12d857. Change-Id: I62a9456e9a4f1571328ba6fd09ae383a8fd11767 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83796 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2024-08-06mb/starlabs/starlite_adl: Add Alder Lake N StarLite Mk VSean Rhodes
Tested using `edk2` from `github.com/starlabsltd/edk2/tree/uefipayload_vs`: * Windows 11 * Ubuntu 22.04 * Manjaro 22 No known issues. https://starlabs.systems/pages/starlite-specification Change-Id: I8724e578c21353032b844b20b868348580ff561b Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80706 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-28 01:19:30 +0000