summaryrefslogtreecommitdiff
path: root/src/mainboard/starlabs/lite/Kconfig
AgeCommit message (Collapse)Author
2024-06-07mb/starlabs/*: Add Kconfig values for battery informationSean Rhodes
Add Kconfig strings for the battery: * Model * OEM * Technology Change-Id: Ibbce87ad54874f490af45c41f31956a7e9e996f3 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81401 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-02-18mb/samsung to mb/up: Add SPDX license headers to Kconfig filesMartin Roth
Change-Id: Ied455ff29b151fb5f4bca26a189b1d4104d8cede Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80595 Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-10-26mb/starlabs/*/Kconfig: Fix default power state after failureMatt DeVillier
POWER_STATE_OFF_AFTER_FAILURE can't be directly selected since it's a choice, so instead set POWER_STATE_DEFAULT_ON_AFTER_FAILURE to n, as it's functionally equivalent. This fixes the warnings generated by the pre-commit hook Kconfig check. It is necessary to override and set default n in the mainboard Kconfig as it is set to default y in src/soc/intel/common/block/pmc/Kconfig. TEST=select starlabs/starbook_adl in menuconfig and verify the default power-on setting is S5/soft off. Change-Id: I3ce33517dcc0af693b8db8d1de2926117ad3c16b Signed-off-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78627 Reviewed-by: Sean Rhodes <sean@starlabs.systems> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Eric Lai <ericllai@google.com>
2023-10-20mb/starlabs: Set POWER_STATE_OFF_AFTER_FAILURESean Rhodes
This Kconfig option is used as a failback when `get_uint_option` fails. It will fail after coreboot is flashed, as the cfr code has not yet setup the options. Change the default to OFF, so when it does fallback, it's the correct behaviour. Change-Id: I5d06047fe23322520e9c84ded8f1941f6d716a51 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78223 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2022-12-22mb/starlabs/*: Bind console serial output to EDK2_DEBUGSean Rhodes
Configure the UART port but only enable UART debug for EDK2 debug builds. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I54e1dc5768fd765254c7ede91eaa45842fed3bd6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/69322 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-10-06mb/starlabs/lite/glkr: Enable configuring Fast Charging on the Lite Mk IVSean Rhodes
Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I714867d455c4e0d01d6cb1cb9dc64669fb41100c Reviewed-on: https://review.coreboot.org/c/coreboot/+/66319 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-10-06mb/starlabs/lite: Add variant specific cmos.layout and cmos.defaultSean Rhodes
Add variant specific cmos files, which avoid options like "FastCharge" existing in platforms that don't support such options. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I04264cf72d47ef719acfd144d8bf9acb0ceccc11 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66297 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-08-21mb/starlabs/*: Disable INTEL_LPSS_UART_FOR_CONSOLESean Rhodes
Disable INTEL_LPSS_UART_FOR_CONSOLE to stop debug output on UART 2. This decreases boot time on all boards by around 60%. TGL before: Total Time: 10,110,807 TGL after: Total Time: 3,851,641 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I8f8d5cd46e87e7dafe0669b4a29c872b1789eb60 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66744 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-08-13payloads/tianocore: Rename TianoCore to edk2Sean Rhodes
coreboot uses TianoCore interchangeably with EDK II, and whilst the meaning is generally clear, it's not the payload it uses. EDK II is commonly written as edk2. coreboot builds edk2 directly from the edk2 repository. Whilst it can build some components from edk2-platforms, the target is still edk2. [1] tianocore.org - "Welcome to TianoCore, the community supporting" [2] tianocore.org - "EDK II is a modern, feature-rich, cross-platform firmware development environment for the UEFI and UEFI Platform Initialization (PI) specifications." Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I4de125d92ae38ff8dfd0c4c06806c2d2921945ab Reviewed-on: https://review.coreboot.org/c/coreboot/+/65820 Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-07-25mb/starlabs/lite: Add support for VBOOTSean Rhodes
Add the required files to support VBOOT for when it is enabled. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I083107b21c23f42193fc88aa174ec22850f45bc8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65705 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
2022-05-28mb/starlabs/lite: Remove webcam USB port from devicetreeSean Rhodes
Remove the Webcam USB port form the devicetree and handle it solely in devtree, which will enable or disable it based on the CMOS option. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I9c89c7103aca5c3d42215122e9d94c83947b6fee Reviewed-on: https://review.coreboot.org/c/coreboot/+/64544 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-04-21tpm: Refactor TPM Kconfig dimensionsJes B. Klinke
Break TPM related Kconfig into the following dimensions: TPM transport support: config CRB_TPM config I2C_TPM config SPI_TPM config MEMORY_MAPPED_TPM (new) TPM brand, not defining any of these is valid, and result in "generic" support: config TPM_ATMEL (new) config TPM_GOOGLE (new) config TPM_GOOGLE_CR50 (new, implies TPM_GOOGLE) config TPM_GOOGLE_TI50 (new to be used later, implies TPM_GOOGLE) What protocol the TPM chip supports: config MAINBOARD_HAS_TPM1 config MAINBOARD_HAS_TPM2 What the user chooses to compile (restricted by the above): config NO_TPM config TPM1 config TPM2 The following Kconfigs will be replaced as indicated: config TPM_CR50 -> TPM_GOOGLE config MAINBOARD_HAS_CRB_TPM -> CRB_TPM config MAINBOARD_HAS_I2C_TPM_ATMEL -> I2C_TPM && TPM_ATMEL config MAINBOARD_HAS_I2C_TPM_CR50 -> I2C_TPM && TPM_GOOGLE config MAINBOARD_HAS_I2C_TPM_GENERIC -> I2C_TPM && !TPM_GOOGLE && !TPM_ATMEL config MAINBOARD_HAS_LPC_TPM -> MEMORY_MAPPED_TPM config MAINBOARD_HAS_SPI_TPM -> SPI_TPM && !TPM_GOOGLE && !TPM_ATMEL config MAINBOARD_HAS_SPI_TPM_CR50 -> SPI_TPM && TPM_GOOGLE Signed-off-by: Jes B. Klinke <jbk@chromium.org> Change-Id: I4656b2b90363b8dfd008dc281ad591862fe2cc9e Reviewed-on: https://review.coreboot.org/c/coreboot/+/63424 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-04-04mb/starlabs/lite: Add Lite Mk IV variantSean Rhodes
Tested using upstream edk2: * Windows 10 * Ubuntu 20.04 * MX Linux 19.4 * Manjaro 21 No known issues. https://starlabs.systems/pages/starlite-specification Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Id1cf2846a139004e9bec7bb27e9afe07b7e6f64f Reviewed-on: https://review.coreboot.org/c/coreboot/+/62706 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-03-01mb/starlabs/lite: Add StarLite Mk IIISean Rhodes
Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Iddbf2022d03735d6a0e6d098c21643f5fdc875f6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60980 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-16 03:03:52 +0000