Age | Commit message (Expand) | Author |
2022-05-23 | mb/siemens/mc_ehl: Disable RAPL | Uwe Poeche |
2022-05-21 | mb/siemens/mc_ehl2: Invert PHY IRQ from falling edge to rising edge | Mario Scheithauer |
2022-05-20 | mb/siemens/mc_ehl2: Quick fix for PSE TSN phy interface type | Lean Sheng Tan |
2022-05-18 | intel/common/block: Provide RAPL and min clock ratio switches in common | Uwe Poeche |
2022-05-17 | mainboard/**/devicetree.cb: Fix typo | Angel Pons |
2022-05-17 | soc/intel/elkhartlake: Enable SMBus depending on dev state | Angel Pons |
2022-05-17 | mb/siemens/mc_ehl2: Disable PCI clock outputs on XIO bridge | Mario Scheithauer |
2022-05-16 | mb/siemens/mc_ehl2: Enable TSN GbE driver | Mario Scheithauer |
2022-05-16 | mb/siemens/mc_ehl2: Set PCH TSN link speed to 1 Gbps in devicetree | Mario Scheithauer |
2022-05-16 | mb/siemens/mc_ehl2: Adjust PSE TSN settings in devicetree | Mario Scheithauer |
2022-04-21 | tpm: Refactor TPM Kconfig dimensions | Jes B. Klinke |
2022-03-14 | mb/siemens/mc_ehl: Increase SPD buffer size to 512 bytes | Werner Zeh |
2022-03-07 | src: Make PCI ID define names shorter | Felix Singer |
2022-03-02 | mb/siemens/mc_ehl: Disable HS400 mode for eMMC | Werner Zeh |
2022-02-22 | mb/siemens/mc_apl2: Enable PCI device for I2C bus 0 | Werner Zeh |
2022-02-12 | mb/siemens/mc_apl{2,4,5,6}: Enable recovery MRC cache | Werner Zeh |
2022-02-03 | mb/siemens/mc_ehl2: Disable PCIe RPs | Mario Scheithauer |
2022-02-03 | mb/siemens/mc_ehl2: Disable SATA | Mario Scheithauer |
2022-02-01 | mb/siemens/{mc_apl1,...,mc_apl6}: Disable SATA ALPM support | Mario Scheithauer |
2022-01-25 | mb/siemens/mc_ehl: Prevent reset when TCO expires | Werner Zeh |
2022-01-21 | soc/intel/ehl: Replace dt `HeciEnabled` by `HECI1 disable` config | Subrata Banik |
2022-01-10 | src/mainboard/{siemens,starlabs}: Remove unused <console/console.h> | Elyes HAOUAS |
2021-12-23 | mb: Add space before closing comment block keyword | Paul Menzel |
2021-12-18 | mb/siemens/chili: Reuse options from Kconfig.name | Felix Singer |
2021-12-10 | mb/siemens/mc_ehl: Enable TPM in bootblock | Werner Zeh |
2021-11-17 | mb/siemens/mc_ehl1: Send POST codes to NC FPGA via PCI | Werner Zeh |
2021-11-15 | mb/siemens/mc_ehl2: Adjust PCIe clock source settings in devicetree | Mario Scheithauer |
2021-11-15 | mb/siemens/mc_ehl: Disable HECI #2 device | Mario Scheithauer |
2021-11-04 | treewide: Replace bad uses of `find_resource` | Angel Pons |
2021-11-04 | mb/siemens/mc_ehl: Disable PMC low power modes | Werner Zeh |
2021-11-04 | mb/siemens/mc_ehl: Disable all P-States | Werner Zeh |
2021-11-04 | mb/siemens/mc_ehl: Disable C-States for CPU and package | Werner Zeh |
2021-11-04 | mb/siemens/mc_ehl2: Clean up devicetree | Mario Scheithauer |
2021-11-04 | mb/siemens/mc_ehl: Enable Row-Hammer prevention | Mario Scheithauer |
2021-11-04 | mb/siemens/mc_ehl2: Configure SD card detect pin in devicetree | Mario Scheithauer |
2021-11-04 | mb/siemens/mc_ehl2: Clean up PCIe root port settings in devicetree | Mario Scheithauer |
2021-11-04 | mb/siemens/mc_ehl2: Adjust PCIe clock settings in devicetree | Mario Scheithauer |
2021-11-03 | mb/siemens/mc_ehl1: Adjust PCIe clock settings in devicetree | Werner Zeh |
2021-11-02 | mb/siemens/mc_ehl1: Clean up PCIe root port settings in devicetree | Werner Zeh |
2021-11-02 | mb/siemens/mc_ehl1: Clean up devicetree | Werner Zeh |
2021-10-27 | mb/siemens/chili: Drop redundant Kconfig select | Angel Pons |
2021-10-14 | mb/siemens/mc_ehl2: Adjust PCH serial IO settings | Mario Scheithauer |
2021-10-14 | mb/siemens/mc_ehl2: Adjust USB settings | Mario Scheithauer |
2021-10-14 | mb/siemens/mc_ehl2: Enable PCI devices | Mario Scheithauer |
2021-10-14 | mb/siemens/mc_ehl2: Set coreboot ready LED | Mario Scheithauer |
2021-10-12 | mb/siemens/mc_ehl: Remove unneeded 'half_populated' variable | Werner Zeh |
2021-10-12 | mb/siemens/mc_ehl: Use SPD data from HW-Info in the first place | Werner Zeh |
2021-10-11 | mb/siemens/mc_ehl2: Adjust Legacy IRQ routing for PCI devices | Mario Scheithauer |
2021-10-11 | mb/siemens/mc_ehl: Add variant_mainboard_final() | Mario Scheithauer |
2021-10-11 | mb/siemens/mc_ehl2: Enable LPC ComB | Mario Scheithauer |
2021-10-11 | mb/siemens/mc_ehl2: Disable INTEL_LPSS_UART_FOR_CONSOLE | Mario Scheithauer |
2021-10-11 | mb/siemens/mc_ehl2: Adjust GPIOs | Mario Scheithauer |
2021-10-11 | mb/siemens/mc_ehl2: Disable SATA Port 0 | Mario Scheithauer |
2021-10-11 | mb/siemens/mc_ehl2: Enable SD-Card | Mario Scheithauer |
2021-10-11 | mb/siemens/mc_ehl2: Move RTC RX6110SA from SMBus to I2C2 | Mario Scheithauer |
2021-10-11 | mb/siemens/mc_ehl2: Update SPD for DDR4 devices | Mario Scheithauer |
2021-10-01 | mb/siemens/mc_ehl: Move UART_FOR_CONSOLE switch to variant level | Werner Zeh |
2021-10-01 | mb/siemens/mc_ehl: Add a new variant mc_ehl2 | Werner Zeh |
2021-10-01 | mb/siemens/mc_ehl1: Enable LPSS UART | Werner Zeh |
2021-09-03 | src/*: Specify type of `DIMM_SPD_SIZE` once | Angel Pons |
2021-08-28 | soc/intel/common: Use CHIPSET_LOCKDOWN_COREBOOT by default | Felix Singer |
2021-08-13 | mb/{kontron/bsl6,siemens/chili}: Add `inhibit_flashlock` nvram option | Nico Huber |
2021-08-02 | mb/siemens/mc_ehl: Enable master bit in PCI config space if allowed | Werner Zeh |
2021-08-02 | mb/siemens/mc_ehl: Add code to wait for legacy devices before PCI scan | Werner Zeh |
2021-07-29 | mb/siemens/mc_ehl1: Disable LTR for all PCIe root ports | Werner Zeh |
2021-07-29 | mb/siemens/mc_ehl1: Disable L1 substates for PCIe root ports | Werner Zeh |
2021-07-29 | mb/siemens/mc_ehl1: Enable Intel I210 MACPHY driver | Werner Zeh |
2021-07-29 | mb/siemens/mc_ehl: Enable Siemens NC-FPGA driver | Werner Zeh |
2021-07-29 | mb/siemens/mc_ehl: Enable SIEMENS_HWILIB | Werner Zeh |
2021-07-29 | mb/siemens/mc_ehl1: Enable In Band ECC | Werner Zeh |
2021-07-29 | mb/siemens/mc_ehl1: Disable System Agent dynamic frequency support | Werner Zeh |
2021-07-29 | mb/siemens/mc_ehl: Enable measured boot | Werner Zeh |
2021-07-29 | mb/siemens/mc_ehl: Enable LPC TPM | Werner Zeh |
2021-07-29 | mb/siemens/mc_ehl: Add external RTC RX6110SA | Werner Zeh |
2021-07-26 | mb/*: Specify type of `VARIANT_DIR` once | Angel Pons |
2021-07-26 | mb/*: Specify type of `FMDFILE` once | Angel Pons |
2021-07-26 | mb/*: Specify type of `DEVICETREE` once | Angel Pons |
2021-07-26 | mb/*: Specify type of `MAINBOARD_PART_NUMBER` once | Angel Pons |
2021-07-26 | mb/*: Specify type of `MAINBOARD_DIR` once | Angel Pons |
2021-07-26 | src/*: Specify type of `CBFS_SIZE` once | Angel Pons |
2021-07-23 | mb/siemens/mc_ehl1: Add GPIO configuration | Werner Zeh |
2021-07-23 | mb/siemens/mc_ehl1: Remove SD-Card card detect GPIO in devicetree | Werner Zeh |
2021-07-23 | mb/siemens/mc_apl{1,2,3,5,6}: Use PCI_ALLOW_BUS_MASTER_ANY_DEVICE | Werner Zeh |
2021-07-22 | mb/siemens/mc_ehl1: Disable GSPI in devicetree | Werner Zeh |
2021-07-22 | mb/siemens/mc_ehl1: Adjust I2C bus enablement in devicetree | Werner Zeh |
2021-07-22 | mb/siemens/mc_ehl1: Disable power management features for SATA | Werner Zeh |
2021-07-22 | mb/siemens/mc_ehl1: Adjust PCIe settings in devicetree | Werner Zeh |
2021-07-22 | mb/siemens/mc_ehl1: Adjust USB port settings in devicetree | Werner Zeh |
2021-07-22 | mb/siemens/mc_ehl1: Remove display related UPDs from devicetree | Werner Zeh |
2021-07-21 | mb/siemens/mc_apl{1,2,3,5,6}: Set PCI bus master bit only if allowed | Werner Zeh |
2021-07-20 | mb/siemens/mc_ehl: Move SPD data to variant directory | Werner Zeh |
2021-07-14 | mb/siemens/chili: Drop ineffective `SaGv` setting | Angel Pons |
2021-07-13 | mb/siemens/chili: Use CHIPSET_LOCKDOWN_COREBOOT | Felix Singer |
2021-07-07 | mb/siemens/mc_ehl: Switch to 16 MB ROM and provide a flashmap | Werner Zeh |
2021-07-07 | mb/siemens/mc_ehl: Clean up Kconfig | Werner Zeh |
2021-07-05 | mb/siemens/mc_ehl: Provide a proper scheme for variants | Werner Zeh |
2021-07-05 | mb/siemens/mc_ehl: Add new mainboard based on elkhartlake_crb | Werner Zeh |
2021-06-29 | Kconfig: Escape variables | Patrick Georgi |
2021-06-04 | mb/siemens/mc_apl2: Disable unused I2C controllers | Werner Zeh |
2021-06-04 | mb/siemens/mc_apl{1,2,3,5,6}: Provide I2C timings for 400 kHz | Werner Zeh |