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path: root/src/mainboard/siemens
AgeCommit message (Expand)Author
2018-11-29siemens/mc_apl5: Set bus master bit for on-board PCI deviceMario Scheithauer
2018-11-29siemens/mc_apl5: Enable SDCARDMario Scheithauer
2018-11-28mb/*/*/Kconfig: Remove useless commentElyes HAOUAS
2018-11-27siemens/mc_apl5: Adjust the settings for the PCIe root portsMario Scheithauer
2018-11-26siemens/mc_apl1/variants/mc_apl*: Remove unneeded PTN readMario Scheithauer
2018-11-23siemens/mc_apl4: Set CPU clock to minimum ratioWerner Zeh
2018-11-23mb: Set coreboot as DSDT's manufacturer model IDElyes HAOUAS
2018-11-21ACPI: Fix DSDT's revision fieldElyes HAOUAS
2018-11-18siemens/mc_apl5: Add new mainboard variant mc_apl5Mario Scheithauer
2018-11-16mb/siemens/mc_apl1/variants/mc_apl*: Remove unused BOARD_SIEMENS_MC_APL*_VARElyes HAOUAS
2018-11-16src: Remove unneeded include <cbfs.h>Elyes HAOUAS
2018-11-16src: Remove unneeded include <lib.h>Elyes HAOUAS
2018-11-16mb/*/*/Kconfig: Use CONFIG_VARIANT_DIR for devicetreePeter Lemenkov
2018-11-16siemens/mc_apl4: Clean up ramstageMario Scheithauer
2018-11-16siemens/mc_apl4: Overwrite swizzle data for LPDDR4Mario Scheithauer
2018-11-12src: Remove unneeded include "{arch,cpu}/cpu.h"Elyes HAOUAS
2018-11-12siemens/mc_apl4: Enable SDCARDMario Scheithauer
2018-11-12siemens/mc_apl4: Remove external RTC from I2C0Mario Scheithauer
2018-11-12siemens/mc_apl4: Enable all PCIe root portsMario Scheithauer
2018-11-12siemens/mc_apl4: Remove reduced clock rate for I2C0Mario Scheithauer
2018-11-12siemens/mc_apl4: Disable CLKREQ of PCIe root portsMario Scheithauer
2018-11-12siemens/mc_apl3: Disable PCI clock outputs on XIO bridgesMario Scheithauer
2018-11-12siemens/mc_apl3: Set Full Reset Bit into Reset Control RegisterMario Scheithauer
2018-11-12siemens/mc_apl3: Set bus master bit for on-board PCI deviceMario Scheithauer
2018-11-12siemens/mc_apl3: Remove the correction of the Tx signal for SATAMario Scheithauer
2018-11-12siemens/mc_apl3: Adjust Legacy IRQ routing for PCI devicesMario Scheithauer
2018-11-07siemens/mc_apl4: Add new mainboard variant mc_apl4Mario Scheithauer
2018-11-07siemens/mc_apl2: Adjust GPIO settings for mc_apl2Mario Scheithauer
2018-11-07siemens/mc_apl3: Disable I2C7 over devicetreeMario Scheithauer
2018-11-07siemens/mc_apl3: Enable all PCIe root portsMario Scheithauer
2018-11-07siemens/mc_apl3: Remove reduced clock rate for I2C0Mario Scheithauer
2018-11-07siemens/mc_apl3: Disable CLKREQ of PCIe root portsMario Scheithauer
2018-11-07siemens/mc_apl3: Adjust GPIO settings for mc_apl3Mario Scheithauer
2018-11-05mainboard: Remove unneeded include <console/console.h>Elyes HAOUAS
2018-10-30siemens/mc_apl3: Add new mainboard variant mc_apl3Mario Scheithauer
2018-10-23src: Remove unneeded whitespaceElyes HAOUAS
2018-10-17mb/*/*: Clean up FADT checksum assignmentJonathan Neuschäfer
2018-10-08Move compiler.h to commonlibNico Huber
2018-10-06soc/intel/common, mb/google, mb/siemens: Use lower case x for RXDFurquan Shaikh
2018-10-04mc_apl1: Set up SPI OPCODE menu before lockingWerner Zeh
2018-10-01siemens/mc_apl1: Activate clock spreading for PTN3460Mario Scheithauer
2018-09-27siemens/mc_apl1: Add new mainboard variant mc_apl2Mario Scheithauer
2018-09-27siemens/mc_apl1: Make the DDR memory swizzle data configurableMario Scheithauer
2018-08-31siemens/mc_apl1: Correct the Tx signal from SATA interfaceMario Scheithauer
2018-08-28siemens/mc_apl1: Extend circuit life by clock gating and power gatingMario Scheithauer
2018-08-27siemens/mc_apl1: Disable PCI clock outputs on XIO bridgeMario Scheithauer
2018-08-24siemens/mc_apl1: Select DDR50 mode for eMMCMario Scheithauer
2018-08-23siemens/mc_apl1: Make adjustments for the 1st redesign of this mainboardMario Scheithauer
2018-08-23siemens/mc_apl1: Move board specific things to mc_apl1 variantMario Scheithauer
2018-08-13src/mb: Remove some unneeded includesElyes HAOUAS
2018-08-13mb: Get rid of unneeded include <cbmem.h>Elyes HAOUAS
2018-08-09src/mainboard: Fix typoElyes HAOUAS
2018-06-06soc/intel/common/block: Add common chip config blockSubrata Banik
2018-06-04mb/siemens: Get rid of whitespace before tabElyes HAOUAS
2018-05-31cpu/x86/mtrr: Get rid of CACHE_ROM_SIZE_OVERRIDENico Huber
2018-05-31Remove all AMD K8 boardsKyösti Mälkki
2018-05-23mb/siemens/sitemp_g1p1: Get rid of device_tKyösti Mälkki
2018-05-15mainboard/amd/*: Remove unused arguments from SIOW ACPI methodMartin Roth
2018-05-08mb/siemens: Get rid of device_tElyes HAOUAS
2018-05-08src/mainboard: Set ACPI OEM ID values to 6 characters longMartin Roth
2018-04-27siemens/mc_apl1: Move board specific things to mc_apl1 variantMario Scheithauer
2018-04-26siemens/mc_apl1: Provide baseboard and variant conceptsMario Scheithauer
2018-04-24compiler.h: add __weak macroAaron Durbin
2018-04-13siemens/mc_apl1: Fix accuracy issue with IDT PMICMario Scheithauer
2018-04-11siemens/mc_apl1: Make DRAM configuration more flexibleMario Scheithauer
2018-03-16soc/intel/apollolake and mainboards: Use pcie_rp_clkreq_pin arrayFurquan Shaikh
2018-02-26mb/siemens/mc_bdx1: Avoid dereferencing a NULL pointerWerner Zeh
2018-02-15siemens/mc_bdx1: Show mainboard hardware version on consoleWerner Zeh
2018-02-15siemens/mc_bdx1: Enable PCA9538 I/O expanderWerner Zeh
2018-01-26mb/*/*/cmos.layout: Fix the values for the console levelArthur Heymans
2017-11-28AMD platforms: Fix ASL comment that implies "\_SB" is southbridgeMartin Roth
2017-11-07siemens/mc_apl1: Select CONFIG_NC_FPGA_NOTIFY_CB_READYMario Scheithauer
2017-11-03siemens/mc_apl1: Enable I2C0 with 100kHzMario Scheithauer
2017-11-03siemens/mc_apl1: Set coreboot ready LEDMario Scheithauer
2017-11-03siemens/mc_apl1: Add legacy IRQ routing for PCI devicesMario Scheithauer
2017-10-19siemens/mc_bdx1: Initialize GPIOsWerner Zeh
2017-10-12siemens/mc_bdx1: Add delay to wait for legacy devicesWerner Zeh
2017-09-26Use stopwatch_wait_until_expired where applicableJonathan Neuschäfer
2017-09-23mb/*/*: Remove rtc nvram configurable baud rateArthur Heymans
2017-09-21siemens/mc_apl1: Move SCI to IRQ 10Mario Scheithauer
2017-09-14siemens/mc_apl1: Add delay to wait for legacy devicesWerner Zeh
2017-09-08siemens/mc_apl1: Disable internal UARTsMario Scheithauer
2017-09-08siemens/mc_apl1: Set bus master bit for on-board PCI deviceMario Scheithauer
2017-08-23AMD fam10 ACPI: Use common fixed sleepstates.aslKyösti Mälkki
2017-08-22AMD K8 fam10-15: Consolidate post_cache_as_ram callKyösti Mälkki
2017-08-18drivers/i2c/rx6110sa: Drop I2C interface arbitrationNico Huber
2017-08-18include/device: Split i2c.h into threeNico Huber
2017-08-15soc/intel/common/block: Add LPC Common code and use it for APLRavi Sarawadi
2017-07-27siemens/mc_apl1: Select skip RAPL configurationMario Scheithauer
2017-07-20siemens/mc_apl1: Activate ECC for DRAMMario Scheithauer
2017-07-20siemens/mc_apl1: Include platform.aslMario Scheithauer
2017-07-18siemens/mc_apl1: Disable SDCARDMario Scheithauer
2017-07-14K8: Fix indirect includesKyösti Mälkki
2017-07-13Rename __attribute__((packed)) --> __packedStefan Reinauer
2017-07-06mainboard/[m-w]: add IS_ENABLED() around Kconfig symbol referencesMartin Roth
2017-06-30mb/siemens/mc_apl1: Set up RTC backup mode to primary cellWerner Zeh
2017-06-30mb/siemens/mc_bdx1: Set up RTC backup mode to primary cellWerner Zeh
2017-06-29mb/siemens/mc_bdx1: Set bus master bit for on-board PCI devicesWerner Zeh
2017-06-23siemens/mc_apl1: Enable decoding for COM 3 on LPCMario Scheithauer
2017-06-23siemens/mc_apl1: Disable XDCIMario Scheithauer
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