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path: root/src/mainboard/siemens/mc_apl1/variants/mc_apl5
AgeCommit message (Expand)Author
2021-01-20mb/siemens/{mc_apl1,...,mc_apl6}: Configure FSP-S UPDsMario Scheithauer
2021-01-15mb/siemens/mc_apl1: do LPC/eSPI pad configuration at board-levelMichael Niewöhner
2020-11-30mb/siemens/mc_apl1: Deduplicate wait_for_legacy_dev()Angel Pons
2020-11-23mb/siemens/mc_apl1: Use `pci_or_config16` functionAngel Pons
2020-09-19apollolake boards: Enable CSE in devicetreeSubrata Banik
2020-06-30src: Remove whitespaces before tabsElyes HAOUAS
2020-06-19Kconfig: Escape variable to accommodate new Kconfig versionsPatrick Georgi
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-04-04mainboard/siemens: Use SPDX for GPL-2.0-only filesAngel Pons
2020-03-31security/vboot: Decouple measured boot from verified bootBill XIE
2020-03-18mainboard/[^a-p]*: Remove copyright noticesPatrick Georgi
2019-11-12src/mainboard/siemens: Use PTN3460 chip driverUwe Poeche
2019-10-18mb/siemens/mc_apl{3,5}: Remove __weak symbol from GPIO functionsWerner Zeh
2019-09-25mb/siemens/mc_apl{2,4,5}: Enable VBOOTWerner Zeh
2019-09-05mb/siemens/mc_apl5: Disable IGD if no EDID data availableMario Scheithauer
2019-07-18mb/siemens/{mc_apl1,...,mc_apl5}: Fix GPIO settingsMario Scheithauer
2019-07-11mb/siemens/{baseboard,mc_apl3,mc_apl4,mc_apl5}: Fix GPIO_168Mario Scheithauer
2019-07-11mb/siemens/{mc_apl1,...,mc_apl5}: Reduce eMMC bus speed modeMario Scheithauer
2019-06-21siemens/mc_apl5: Change PTN interface settingsMario Scheithauer
2019-06-21siemens/mc_apl5: Enable TPM supportMario Scheithauer
2019-06-06siemens/mc_apl5: Add own GPIO tableMario Scheithauer
2019-05-29src/mainboard: Add missing 'include <types.h>'Elyes HAOUAS
2019-04-15mb/siemens/mc_apl1: Enable HDA in devicetree for all mainboard variantsWerner Zeh
2019-04-08siemens/mc_apl5: Remove reduced clock rate for I2C0Mario Scheithauer
2019-03-15mb/mc_apl1/variants/mc_apl5: Drop unused '#include <lib.h>'Elyes HAOUAS
2019-03-06mb/siemens/{mc_apl1,mc_tcu3}: Fix typo on "Display"Elyes HAOUAS
2019-02-05mb/siemens/mc_apl1: Enable VTD for mc_apl2 and mc_apl5Werner Zeh
2018-11-29siemens/mc_apl5: Disable PCI clock outputs on XIO bridgesMario Scheithauer
2018-11-29siemens/mc_apl5: Set bus master bit for on-board PCI deviceMario Scheithauer
2018-11-29siemens/mc_apl5: Enable SDCARDMario Scheithauer
2018-11-27siemens/mc_apl5: Adjust the settings for the PCIe root portsMario Scheithauer
2018-11-26siemens/mc_apl1/variants/mc_apl*: Remove unneeded PTN readMario Scheithauer
2018-11-18siemens/mc_apl5: Add new mainboard variant mc_apl5Mario Scheithauer