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path: root/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb
AgeCommit message (Expand)Author
2021-01-20mb/siemens/{mc_apl1,...,mc_apl6}: Configure FSP-S UPDsMario Scheithauer
2020-09-19apollolake boards: Enable CSE in devicetreeSubrata Banik
2020-06-30src: Remove whitespaces before tabsElyes HAOUAS
2019-11-12src/mainboard/siemens: Use PTN3460 chip driverUwe Poeche
2019-07-11mb/siemens/{mc_apl1,...,mc_apl5}: Reduce eMMC bus speed modeMario Scheithauer
2019-06-21siemens/mc_apl5: Enable TPM supportMario Scheithauer
2019-04-15mb/siemens/mc_apl1: Enable HDA in devicetree for all mainboard variantsWerner Zeh
2019-04-08siemens/mc_apl5: Remove reduced clock rate for I2C0Mario Scheithauer
2019-02-05mb/siemens/mc_apl1: Enable VTD for mc_apl2 and mc_apl5Werner Zeh
2018-11-29siemens/mc_apl5: Enable SDCARDMario Scheithauer
2018-11-27siemens/mc_apl5: Adjust the settings for the PCIe root portsMario Scheithauer
2018-11-18siemens/mc_apl5: Add new mainboard variant mc_apl5Mario Scheithauer
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-07 16:08:45 +0000