Age | Commit message (Expand) | Author |
---|---|---|
2019-05-29 | src/mainboard: Add missing 'include <types.h>' | Elyes HAOUAS |
2019-03-04 | arch/io.h: Add missing includes | Kyösti Mälkki |
2018-11-12 | siemens/mc_apl3: Disable PCI clock outputs on XIO bridges | Mario Scheithauer |
2018-11-12 | siemens/mc_apl3: Set Full Reset Bit into Reset Control Register | Mario Scheithauer |
2018-11-12 | siemens/mc_apl3: Set bus master bit for on-board PCI device | Mario Scheithauer |
2018-11-12 | siemens/mc_apl3: Remove the correction of the Tx signal for SATA | Mario Scheithauer |
2018-11-12 | siemens/mc_apl3: Adjust Legacy IRQ routing for PCI devices | Mario Scheithauer |
2018-10-30 | siemens/mc_apl3: Add new mainboard variant mc_apl3 | Mario Scheithauer |