Age | Commit message (Collapse) | Author | |
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2017-08-15 | soc/intel/common/block: Add LPC Common code and use it for APL | Ravi Sarawadi | |
Add LPC common code to be shared across Intel platforms. Also add LPC library functions to be shared across platforms. Use common LPC code for Apollo Lake soc. Update existing Apollolake mainboard variants {google,intel,siemens} to use new common LPC header file. Change-Id: I6ac2e9c195b9ecda97415890cc615f4efb04a27a Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com> Reviewed-on: https://review.coreboot.org/20659 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> | |||
2017-02-02 | siemens/mc_apl1: Add new mainboard | Mario Scheithauer | |
This mainboard is based on Intel's Leafhill CRB with Apollo Lake silicon. In a first step, it concerns only a copy of intel/leafhill directory with minimum changes. Special adaptations for MC APL1 mainboard will follow in separate commits. Change-Id: If0b8a2bc21c99c3be4e6043e8febfb1b91ff0a63 Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/18272 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Brenton Dong <brenton.m.dong@intel.com> |