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Will be used to determine the board revision.
Change-Id: I41e4c6ad83e23c9d79e6abab3f38ad46bd3bec06
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50788
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Add settings describing the BMC.
Will be used by the following patch to read the board revision.
Change-Id: If464138fc1bdf02a45a21f638b179048d68d974d
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50787
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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The I2C EEPROM on SMBUS needs to be updated with the current board
layout, so that the BMC knows the actual configuration.
Collect all needed information and update the EEPROM if something
changed. Every byte written add a delay of 5 msec.
Change-Id: Ic8485e6c700eede75b1e829238ee70da65118ace
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48810
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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* Check and print errors returned from reading from I2C
* Rework offset calculation by using more macros
* Get rid of stage-specific preprocessor code
* Define the EEPROM layout as struct
* Make use of the defined EEPROM layout to calculate offsets
* Read the UPD to disable VT-d from EEPROM
Change-Id: Iad77811318c7dfd3a3a4f8d523cfa0f457f168b6
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48808
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Hermes has an EEPROM with firmware configuration data. Add definitions
to read and verify the `board settings` from the EEPROM. Subsequent
commits will hook up these EEPROM settings.
Change-Id: Id86632192ae53fd6b0e4df5b26b5a0a81e972818
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48806
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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Only one EEPROM is used to store the board settings, and its I2C address
is constant. Thus, there's no need to pass its address as a parameter.
In addition, reduce the scope of the `I2C_ADDR_EEPROM` definition, since
using it outside of eeprom.c would bypass the API's abstraction layer.
Change-Id: I958304e6ed6df05af923139d44ff4fd1de204738
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46565
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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Drop chipset register definitions in mainboard code in favor of existing
definitions in a header. These definitions are not mainboard-specific.
Tested with BUILD_TIMELESS=1, Prodrive Hermes remains identical.
Change-Id: I29d6f35ec27bff43cf52ae697e905b6a7b48a8d1
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48805
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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Allow to specify which signature is to be checked.
Change-Id: Ica874b1c4283fdb8dbd702c34ccb3315a2cf160d
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48147
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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This allows dropping ugly preprocessor usage from this file.
Change-Id: Idb66d295129d98725f38d11ac162978418bd94c2
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47959
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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Most of the existing comments are C-style already.
Change-Id: I9ca4779f5b0560320e9bce4f33e54766522689f9
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47957
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
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This patch adds support for the Prodrive Hermes mainboard.
Tested with CoffeeLakeFspBinPkg FSP 7.0.68.41.
Untested:
* CNVi
* Intel Graphics
Tested:
* CPU Intel Xeon E2288G
* CPU Intel Core i3-9100F
* CPU Intel Core i7 9700KF
* CPU Intel Core i7 9700E
* CPU Intel Core i7 9700F
* CPU Intel Core i5 9600K
* CPU Intel Pentium Gold G5400
* PCIe Link Width x8 on Slot6 by changing PCIe mux
* All four DDR4 slots in different configurations
* USB2.0 HDR1
* USB2.0 HDR2
* USB3.0 HDR
* Slot1
* Slot2
* Slot3
* Slot4
* Slot6
* M2.M NVMEe
* Ethernet PHYs 0-4
* Aspeed BMC PCIe
* Aspeed BMC USB
* Aspeed Graphics init
* USB3 backplane all working
* I801 SMBUS
Not Working:
* Intel HDA
Change-Id: Id7d051d3fa6823618691d5572087c9ae589c2862
Signed-off-by: Christian Walter <christian.walter@9elements.com>
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Christian Walter <christian.walter@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38303
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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