coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2022-03-07	src: Make PCI ID define names shorter	Felix Singer
2021-12-12	mainboard: Drop `SataMode` setting from Cannon Lake devicetrees	Felix Singer
2021-11-23	mb/prodrive/hermes: Number Ethernet devices	Angel Pons
2021-10-29	mb/prodrive/hermes: Enable LTR for all PCIe ports	Angel Pons
2021-10-29	mb/prodrive/hermes: Map PCIe clocks to root ports	Angel Pons
2021-10-29	mb/prodrive/hermes: Fix PCIe ClkSrc configuration	Angel Pons
2021-10-26	mb/prodrive/hermes: Remove overridetree	Angel Pons
2021-09-13	mb/prodrive/hermes: Hook up P2SB and PMC in devicetree	Patrick Rudolph
2021-08-28	soc/intel/common: Use CHIPSET_LOCKDOWN_COREBOOT by default	Felix Singer
2020-11-13	soc/intel/cnl: replace the remains of HeciEnabled by device state in dt	Michael Niewöhner
2020-09-04	soc/intel/cnl: Enable HECI3 depending on devicetree	Felix Singer
2020-08-24	mb/prodrive/hermes: Remove duplicate entry from devicetree	Felix Singer
2020-08-23	soc/intel/cnl: Configure FSP option PcieRpSlotImplemented	Nico Huber
2020-08-23	mb/prodrive/hermes: Add root port numbers to comments	Felix Singer
2020-07-28	mb/prodrive/hermes: Relocate device enable options	Felix Singer
2020-07-28	mb/prodrive/hermes: Add ME interface numbers to comments	Felix Singer
2020-06-30	src: Remove whitespaces before tabs	Elyes HAOUAS
2020-06-22	mb/prodrive/hermes: Disable xDCI	Patrick Rudolph
2020-06-06	mb/prodrive/hermes: Add new mainboard port	Christian Walter