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The assignment of header->checksum was in some cases done twice, or
unnecessarily split into two lines.
Change-Id: Ib0c0890d7589e6a24b11e9bda10e6969c7d73c56
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/28988
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
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Change-Id: Id7e8ad63de2a6094c66cbd47ae9b7707a9af4e81
Signed-off-by: Mikolaj Walczak <mwalczak@fb.com>
Reviewed-on: https://review.coreboot.org/28529
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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this enables spi console for wedge100s with broadwell_de. the console
size is 64kb. enabling spi console in `board.fmd` enables code which
calls into `timer_monotonic_get` (from `spi_flash_cmd_poll_bit`) and
`udelay` (from `ich_status_poll`). this patch selects `TSC_CONSTANT_RATE`
in fsp_broadwell_de's Kconfig to satisfy that.
Change-Id: Ib925c5aee88b65c46a81534405c364dd5649f8e8
Signed-off-by: Okash Khawaja <okash.khawaja@gmail.com>
Reviewed-on: https://review.coreboot.org/28528
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
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this enables mrc cache in fmap for wedge100s and always enable it in
Kconfig.
Change-Id: I27cd236f67a6500b40fc3eb731397d408402f041
Signed-off-by: Okash Khawaja <okash.khawaja@gmail.com>
Reviewed-on: https://review.coreboot.org/28527
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I3108193c0e0b644cecb74ae0c7a7b54e24a75b58
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28049
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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Use of device_t has been abandoned in ramstage.
Change-Id: I07e00afbbd2c19cf3ea6e08f228eb39e45f1ad0c
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26983
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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As far as I can see this Kconfig option was used wrong ever since it
was added. According to the commit message of 107f72e (Re-declare
CACHE_ROM_SIZE as aligned ROM_SIZE for MTRR), it was only necessary
to prevent overlapping with CAR.
Let's handle the potential overlap in C macros instead and get rid
of that option. Currently, it was only used by most FSP1.0 boards,
and only because the `fsp1_0/Kconfig` set it to CBFS_SIZE (WTF?).
Change-Id: I4d0096f14a9d343c2e646e48175fe2127198a822
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/26566
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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This patch does the following:
1. Copy src/mainboard/intel/camelbackmountain_fsp to
src/mainboard/ocp/wedge100s.
2. Update Kconfig files
3. Add board.fmd
4. Enable VPD
The OCP Wedge100S is a 100GbE top-of-rack switch with a Xeon D-1500
com-express module. More info is available at
http://www.opencompute.org/wiki/Networking/SpecsAndDesigns.
Signed-off-by: Sudhakar Mamillapalli <sudhakar@fb.com>
Signed-off-by: David Hendricks <dhendricks@fb.com>
Change-Id: Ia150b066124953c7c0abe8ea5a13e4131194ea00
Reviewed-on: https://review.coreboot.org/25671
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
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