coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2020-12-11	mb/ocp/deltalake: Update GPIO configurations according to schematics	Jingle Hsu
	On Delta Lake DVT, dump GPIO settings from UEFI firmware for new PCH (C621A) by util/inteltool and generate the header file by util/intelp2m. The DVT and EVT GPIO configurations are the same. The initial value of GPP_B20 (POST complete) should be high, otherwise BIC would get incorrect sensor readings and see events like PCH prochot. Tested=On OCP Delta Lake DVT, dump GPIO configurations by Intel ITP and verify the results match with the header file. Change-Id: Ic9837a22bc231a4cb919de316ff6f6ee88411ab8 Signed-off-by: Jingle Hsu <jingle_hsu@wiwynn.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47229 Reviewed-by: Tim Chu <Tim.Chu@quantatw.com> Reviewed-by: Jonathan Zhang <jonzhang@fb.com> Reviewed-by: Johnny Lin <Johnny_Lin@wiwynn.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-28	mb/ocp/deltalake: use common driver to configure GPIO	Bryant Ou
	Use the common driver to configure the GPIOs on the Delta Lake platform as done for Tioga Pass in commit 89d2aa0. The GPIO settings are dumped by inteltool with original UEFI firmware, then use intelp2m to generate header file. TEST=Dump GPIO settings by Intel ITP and check if match gpio.h. Change-Id: I8005d4caa2d87b6831099bfec3a40246224f3cb5 Signed-off-by: Bryant Ou <Bryant.Ou.Q@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43548 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>