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path: root/src/mainboard/lenovo
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2014-02-05lenovo/x201: Enable flash prefetching.Vladimir Serbinenko
Speeds up coreboot and especially payload load. Before: 90:load payload 4,530,979 (17,728) 99:selfboot jump 5,103,408 (572,429) After: 90:load payload 4,390,051 (14,849) 99:selfboot jump 4,505,966 (115,915) Change-Id: I45c3042594cda16ab3adde6472e00ec1b2d2a688 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/5145 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-02-03lenovo/x230: Enable msata port.Vladimir Serbinenko
Port 2 is used by msata. Enable it. Change-Id: Ib75227f64c9d77f6cfca1902a78d63b5cdd23d76 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4789 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-02-01lenovo/x201: Skip AT24RF08 detection.Vladimir Serbinenko
AT24RF08 was inherited from RE of original BIOS. As we don't really care if the chip in question is really AT24RF08 or a generic replacement, we can skip this check. Change-Id: I862dd66b2332314beb835f215f1c1cd838aa07b9 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4769 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-02-01lenovo: Handle EEPROM/RFID chip.Vladimir Serbinenko
EEPROM/RFID chip present in thinkpad should be locked in a way to avoid any potential RFID access. Read serial number, UUID and P/N from EEPROM. This info is stored on AT24RF08 chip acessible through SMBUS. Change-Id: Ia3e766d90a094f63c8c854cd37e165221ccd8acd Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4774 Tested-by: build bot (Jenkins) Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
2014-01-26lenovo/t60: Add CMOS defaults.Denis 'GNUtoo' Carikli
The code for handling the invalid CMOS space in mainboard.c is now useless and so it was removed. Change-Id: I86ec6a7f73e32948adff9087d4af5372a49a46a5 Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Reviewed-on: http://review.coreboot.org/3520 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-01-23lenovo/x230: Enable wacom USB portVladimir Serbinenko
Based on lsusb -t info from David Schissler. Change-Id: I061881f531b11dc6f5f7719269cf9f3c9b0b99e1 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4786 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-23lenovo/x230: Add missing copyright line.Vladimir Serbinenko
Change-Id: I5ecd25e23cebf83d4ae9300307aaac527e05c377 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4778 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-23X201: Enable expresscard hotplug.Vladimir Serbinenko
Change-Id: Ieefc2ad775c16de9aa974b2602d55ee047c9f568 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4643 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-23lenovo/x201: Reinit CBMEM only on S3 resume.Vladimir Serbinenko
Change-Id: I0643cdab10cda3f19ab56223f5fa77376a8046ac Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4782 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-23X201: Move early nehalem S3 magic to right place.Vladimir Serbinenko
This MCH magic needs to be done before GPIO. Now S3 (Suspend-to-RAM) works on X201. Change-Id: I319e57af52ff01083bfbffbcd883ac5f453320a1 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4632 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-23Ibexpeak: add missing thermal init.Vladimir Serbinenko
Without it ME doesn't always start correctly and no temperature is reported, no fan management and so on. Change-Id: Iff71f3afbc35a1453a20d182890ae2d196c556bd Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4636 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-23X201: Add missing LPC registersVladimir Serbinenko
Without them PMH7 is inaccessible from running system. Change-Id: Ib5a524325040e253a9d914906f90263fc208c313 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4655 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-23X201: Add missing CPU counter.Vladimir Serbinenko
Change-Id: If9f10ef40193fc84ab1849429b5af678ffe831b2 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4624 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-23X201: Add azalia verb.Vladimir Serbinenko
Adds missing sound codec configuration. Change-Id: I3a7097ab0a7c85524f2400471323f5d2d15569ed Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4641 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-23lenovo/x230/dsdt.asl: Change space to tab.Vladimir Serbinenko
Change-Id: I9e6d39a5a08fe9fd27daeca0e8393ff019b722d4 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4779 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-01-22lenovo/x230: Fix CBMEMKyösti Mälkki
Fix build. Changes to static CBMEM functions were written before this board was in tree. Change-Id: I6b20d0c2815337edc330d384a409f1f939727c2b Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/4781 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2014-01-22CBMEM: Replace cbmem_initialize() with cbmem_recovery()Kyösti Mälkki
The replacement function confirms CBMEM TOC is wiped clean on power cycles and resets. It also introduces compatibility interface to ease up transition to DYNAMIC_CBMEM. Change-Id: Ic5445c5bff4aff22a43821f3064f2df458b9f250 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/4668 Reviewed-by: Aaron Durbin <adurbin@google.com> Tested-by: build bot (Jenkins)
2014-01-22lenovo/x201: Really do EARLY_CBMEM_INITKyösti Mälkki
The board was missing cbmem_initialize() call in romstage. Selecting EARLY_CBMEM_INIT implies this is done in romstage. Change-Id: I9ec93f89fe4cbb9e729532be36db601b6e62bca6 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/4667 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2014-01-22Lenovo X230: new portVladimir Serbinenko
probably a problem in MRC: - EHCI output failure after sysagent - no S3 - no MRC cache - MRC needs watchdog - less MTRR could be used by some memory map optimisations Not tested: - dock (probably doesn't work) - msata (probably works) - wwan (probably works) - mini displayport (probably works) Blobs: MRC VGA Oprom Change-Id: I5bdb9372971f48e048848d57b6c924b79782dbde Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4679 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-01-20X201: Fix SMI bindings.Vladimir Serbinenko
Doesn't have a visible effect currently but it's better if those bindings are correct. Change-Id: I0f1a468e59429b14db139cc48e1e68c0e1841300 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4645 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-01-19board-status: Add board_info.txt extracted from wiki.Vladimir Serbinenko
board_info.txt is a file to be used by board-status to add some useful info to the generated table like flash chip type. This series is autogenerated from wiki page Supported_Motherboards. Change-Id: Ie2bda900713ef4883134477163320936c84c34f5 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4701 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-12X60: Enable WWAN by default.Vladimir Serbinenko
Change-Id: I8e51a8fc03c1d7dbbdc11b121b3ea3ec18f65a5a Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4670 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-12ec/lenovo/h8: Make trackpoint enable a CMOS option.Vladimir Serbinenko
To be consistent with touchpad counterpart. Change-Id: I72d09b41b964f80a81fbf409ef69dd368834a3e2 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4654 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-12ec/lenovo/h8: Remove trackpoint_enable from device tree.Vladimir Serbinenko
Change-Id: I6652e0ad4e0179950f775bbd0200484907bfc976 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4653 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-12ec/lenovo/h8: make wlan config a CMOS optionVladimir Serbinenko
To stay in line with wwan and bluetooth. Change-Id: Iafe2dc97fc2aec5c2ad1834659b796a6b079c1bc Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4652 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-12ec/lenovo/h8: Allow control of low-battery beep.Vladimir Serbinenko
Change-Id: I2f422e83f2afcf0cc3f3ecbace01a8f4f39e87d4 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4663 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-12ec/lenovo/h8: Allow user to disable powermanagement beeps.Vladimir Serbinenko
They're pretty annoying. Change-Id: I44d26dc168927a9cedfd6ecc4c9a51a3a7b362c7 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4662 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-12ibexpeak / bd82x6x: Make SATA mode user-visible option.Vladimir Serbinenko
Ability to choose compatibility mode is interesting for testing payloads and OS for compatibility with older systems. As per comments "ide_legacy_combined # TODO: Does nothing since generations, remove from sb code?" The "combined" mode was removed. It wasn't used by any mobo and the code for it is almost identical to IDE one other than few bits relating to interrupt handling and ISA mode. Change-Id: I407a8fac753b513812a86bef5abcf39c6d81472e Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4658 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-12ec/lenovo/h8: Implement sticky Fn option.Vladimir Serbinenko
Useful for accessibility. Sticky modifier (sticky Fn) is a behaviour of modifier key when you don't have to hold it pressed to achieve the result. E.g. with normal Fn brightness up is: <Press Fn> <Press Home> <Despress Home> <Depress Fn> With sticky Fn you can do: <Press Fn> <Depress Fn> <Press Home> <Despress Home> Change-Id: I4da5adcea02428d936023891de08684cae77c44e Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4661 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-12ec/lenovo/h8: Add an option to swap ctrl and fn.Vladimir Serbinenko
Tested on my X201 and X230. Change-Id: I3c7ec65681157d15c6e87eea64779a08e03ae5a8 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4660 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-12ec/lenovo/h8: Remove wlan_enable and wwan_enable from device tree.Vladimir Serbinenko
wwan_enable was never used. wlan_enable isn't something for device tree but for CMOS config if at all. Change-Id: I765d9d6f0b73b7dc5a57c0c630a53b4b7a0b48cb Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4651 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-01-10Replace all occurences of sprintf with snprintfVladimir Serbinenko
THis reduces risks of bufer overflows. Change-Id: I77f80e76efec16ac0a0af83d76430a8126a7602d Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4279 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-01-09X201: set default USB debug controller to 2.Vladimir Serbinenko
The other port is not easily accessible. Change-Id: I6ea31346a375debcd5fc1c27e4078e3a436715e3 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4635 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-01-09bd82x6x/ibexpeak: Make DRAM reset gate GPIO configurableVladimir Serbinenko
DRAM reset gate GPIO is different on different mobos move it to hidden config with 60 (current value) as default. Set it to 10 for Lenovo X201. Change-Id: I4f3b6876d7c33d4966315091b63a76a9a0064c16 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4622 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-01-04X201: Fix native video initVladimir Serbinenko
Due to recent restructuring X201 native video init has disappeared from config options. Put it back and fix compilation with it. Change-Id: I6d9ba5da196c093abd2df89a6fe5efefece1fb3c Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4606 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-12-19ec/lenovo/h8: Enable 3G modemVladimir Serbinenko
Just like bluetooth and wlan it need to be enabled in EC. Set the appropriate bit in EC if CMOS config says so. Change-Id: Ia48ca3201f013d3b4c4153f32ff536e06b6a2f6d Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4516 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2013-12-16X60/T60: Implement "next display output" button.Vladimir Serbinenko
Most of the code needed for this is already in the tree with X201 patch series but code didn't know where to send the next screen notification and so was disabled. Define right video device. Tested by: Sam Noble Change-Id: I4ff0d220afdca342617ce43c6e5d0164ad8eba27 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4494 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2013-12-15lenovo/x201: Add support for Lenovo X201 (Calpella-based laptop)Vladimir Serbinenko
Was extensively tested on my X201. More info on the wiki Change-Id: I503d77749780422e446b48224ca98a1f22a2c180 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4514 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2013-12-04lenovo/x60: Drop global oprom_is_loadedKyösti Mälkki
Variable use is specific to ChromeOS. Change-Id: I5b61a038e6b08e3b2408c4d990749d45fdf2148d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/4306 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-12-02Introduce a config whether dock is inited in romstage or notVladimir Serbinenko
Instead of depending on exact mobo configure general characteristic whether dock is configured in romstage or ramstage. X60 and T60 have superio in dock so it needs to be inited to get serial, so it should be inited in romstage. On X201 there is nothing useful that early in boot but it's needed to init more to get dock working, in particular EC init needs to be done first. Change-Id: If5072e3dec883a94cd2d5643a92f7f6c3c9feee9 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4294 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-12-02EC H8: remove dependence on IS_X201Vladimir Serbinenko
Instead define brightness up/down function and gfx device and use preprocessor magic to glue it together. Change-Id: I03074ae07b33c1546d229efc3e80606ddbee6300 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4282 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martin.roth@se-eng.com>
2013-12-02global: Fix usage of get_option() to make use of CB_CMOS_ codesAlexandru Gagniuc
Do not directly check the return value of get_option, but instead compare the returned value against a CB_CMOS_ error code, or against CB_SUCCESS. Change-Id: I2fa7761d13ebb5e9b4606076991a43f18ae370ad Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4266 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-12-02lenovo/x60: Add "IBM ThinkPad Embedded Controller" SMBIOS OEM StringPeter Stuge
The Linux thinkpad_acpi.c driver looks for this string while reading information about the system it is running on. This commit does not make the module load but it is one of several things that the module looks for on a ThinkPad. Change-Id: Ia48bbd85ba4d528063695345b0f968d264573341 Signed-off-by: Peter Stuge <peter@stuge.se> Reviewed-on: http://review.coreboot.org/3779 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-12-01H8: Move EC GPE declaration to mainboardVladimir Serbinenko
Change-Id: Iefc481f09268dd15bbc3cbfa8bdd110d44383f6a Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4281 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martin.roth@se-eng.com> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2013-11-24smi: Update mainboard_smi_gpi() to have 32bit argumentDuncan Laurie
With the LynxPoint chipset there are more than 16 possible GPIOs that can trigger an SMI so we need a mainboard handler that can support this. There are only a handful of users of this function so just change them all to use the new prototype. Change-Id: I3d96da0397d6584f713fcf6003054b25c1c92939 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/49530 Reviewed-by: Stefan Reinauer <reinauer@google.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/4145 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2013-11-24Lenovo X60: Native VGA init: Get rid of the memory corruptions.Peter Stuge
Without that fix the GTT points at 0x00000000. The patch was made by Peter Stuge, I just split it and added a commit message. Change-Id: Ia378b600ba2faf00d42635c6503b94ff0cb1bc8c Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Reviewed-on: http://review.coreboot.org/4002 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-24lenovo/x60: native vga init: fix code style issues.Denis 'GNUtoo' Carikli
Change-Id: I054edffbb38b13559da10180fc2c6cd9929ba162 Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Reviewed-on: http://review.coreboot.org/3999 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-24lenovo/x60: export reboot_bits nvram configuration.Denis 'GNUtoo' Carikli
This permits any software running after the ramstage to tell coreboot that the boot was successfull. Change-Id: I6b19160dcf1ea1948360db71d02e344a3bcb44ef Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Reviewed-on: http://review.coreboot.org/3992 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-15Lenovo T60/X60: cmos.layout: Replace tabulators with spaces for consistencyPaul Menzel
Change-Id: Iec0abae8a4b18ac737e9ebb3eac219182729be0f Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/4057 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-10-14Revert "CBMEM: Always have early initialisation"Kyösti Mälkki
This reverts commit de1fe7f655c549e8dce5b34218221890fa5ccc34. While things appeared to work, there were actually invalid references to CAR storage after CAR was torn down on boards without EARLY_CBMEM_INIT. It was discussed use of CAR_GLOBAL should be restricted to boards that handle CAR migration properly. Change-Id: I9969d2ea79c334a7f95a0dbb7c78065720e6ccae Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3968 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-09-21CBMEM: Always select CAR_MIGRATIONKyösti Mälkki
If romstage does not make cbmem_initialize() call, linker should optimize the code for CAR migration away. This simplifies design of CBMEM console by a considerable amount. As console buffer is now migrated within cbmem_initialize() call there is no longer need for cbmemc_reinit() call made at end of romstage. Change-Id: I8675ecaafb641fa02675e9ba3f374caa8e240f1d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3916 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-09-21CBMEM: Always have early initialisationKyösti Mälkki
Assume EARLY_CBMEM_INIT=y everywhere and remove option from Kconfig. If romstage does not make the cbmem_initialize() call, features like COLLECT_TIMESTAMPS and early CBMEM_CONSOLE will execute during romstage, but that data will get lost as no CAR migration is executed. Change-Id: I5615645ed0f5fd78fbc372cf5c3da71a3134dd85 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3917 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-09-21timestamps: Stash early timestamps in CAR_GLOBALKyösti Mälkki
Change-Id: I87b454c748cf885491d5b38bfe53a2ec0e9f38c5 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3910 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-09-21timestamps intel: Move timestamp scratchpad to chipsetKyösti Mälkki
This retrieves back the value stored with store_initial_timestamp() in the bootblock for southbridge. Change-Id: I377c823706c33ed65af023d20d2e4323edd31199 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3908 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-09-17Fix whitespace leaked into treeKyösti Mälkki
Clean whitespace errors that have gotten past lint-stable-003-whitespace and gerrit review. Change-Id: Id76fc68e9d32d1b2b672d519b75cdc80cc4f1ad9 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3920 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-08-29lenovo/x60/romstage.c: Collect timestamps in romstagePaul Menzel
Collect early timestamps in Lenovo X60’s romstage. Selecting the option `COLLECT_TIMESTAMPS` in Kconfig and then doing `cbmem --timestamps` should output the timestamps. Change-Id: I7bd30f03a1b85c38e89c19cdf88b2d20b24abed8 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/3587 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins)
2013-08-15lenovo/t60 lenovo/x60: Default SEABIOS_PS2_TIMEOUT to 3 secondsPeter Stuge
The ThinkPad keyboard controller sometimes needs a while in order to initialize, so let's ask SeaBIOS to wait for it. This change ensures that the internal keyboard always functions correctly on the ThinkPad when coreboot is built with SeaBIOS as payload. Change-Id: I562475ec98b0c1f5d0debf6e9b597748a420f068 Signed-off-by: Peter Stuge <peter@stuge.se> Reviewed-on: http://review.coreboot.org/3735 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martin.roth@se-eng.com>
2013-07-17Revert "lenovo/x60: Add "IBM ThinkPad Embedded Controller" SMBIOS OEM String"Peter Stuge
This reverts commit cd24e3f6a7adecfc9d3b2a2dd2f81d84acffa91b. Change-Id: I3d1fec75d99d0b480a47b4d433c14a681831d9f8 Signed-off-by: Peter Stuge <peter@stuge.se> Reviewed-on: http://review.coreboot.org/3778 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins)
2013-07-17lenovo/x60: Add "IBM ThinkPad Embedded Controller" SMBIOS OEM StringPeter Stuge
The Linux thinkpad_acpi.c driver looks for this string while reading information about the system it is running on. This commit does not make the module load but it is one of several things that the module looks for on a ThinkPad. The use of 3 defines for the serial number template seems odd but it's done in a way that eliminates magic numbers, yet avoids use of strcpy, strlen, strindex, strchr, or strspan: we can have some correctness assured at compile time. Also, the defines can be copy/pasted for other mainboards and we should void errors due to people not changing magic numbers. Change-Id: Ief5f28d2e27bf959cb579c4c8eea9eecc9a89a7c Signed-off-by: Peter Stuge <peter@stuge.se> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/3620 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-07-14lenovo/t60 lenovo/x60: Override SMBIOS Manufacturer to be LENOVOPeter Stuge
This is needed for the Linux thinkpad_acpi.c driver to load. Change-Id: I3d9549395556ffb0abfc3cb52b3d01386c34caa5 Signed-off-by: Peter Stuge <peter@stuge.se> Reviewed-on: http://review.coreboot.org/3731 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-07-13lenovo/x60: Move mainboard_enable() code into a mainboard_init()Peter Stuge
mainboard_enable() is now modelled after google/parrot where the enable function only sets dev->ops->init for the root device to point to a mainboard_init() function, which in turn is called in a later pass over the device tree to do the actual initialization. Change-Id: Iaf9187532a1e432b991260201b95dda85cc312c5 Signed-off-by: Peter Stuge <peter@stuge.se> Reviewed-on: http://review.coreboot.org/3619 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-07-04intel/i945: Use MMCONF_SUPPORT_DEFAULTKyösti Mälkki
Change all PCI configuration accesses to MMIO on all boards with i945 chipset. To enable MMIO style access, add explicit PCI IO config write in the bootblock. Change-Id: Ia1ab73f1a2dcda87db4eb9b2ffddc6f7b4382b01 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3584 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com> Reviewed-by: Nico Huber <nico.huber@secunet.com>
2013-06-19lenovo/t60: Collect timestamps in romstageNico Huber
Collect early timestamps in T60's romstage like some newer boards do. This should also work on X60s (and other ICH7 based systems with EARLY_CBMEM_INIT). Change-Id: I3b2872dd7423f3379ff3b68ad999523ec35fc08e Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: http://review.coreboot.org/3499 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-06-07Lenovo X60: Add int15 handlerDenis 'GNUtoo' Carikli
Without that commit, with CONFIG_PCI_OPTION_ROM_RUN_YABEL, The VGA option rom doesn't init the right display: it initializes the external display, where we have a black scren(with backlight on). This commit is based on the code of mainboard.c in src/mainboard/roda/rk886ex. Change-Id: I8457aaf0503e0efdf0fcba9ff5e8a07ac04c5ca6 Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Reviewed-on: http://review.coreboot.org/3265 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2013-06-04Lenovo X60: Add CMOS defaults.Denis 'GNUtoo' Carikli
After removing power and the CMOS Battery, putting it back and booting coreboot we have: # ./nvramtool -a boot_option = Fallback last_boot = Fallback baud_rate = 115200 debug_level = Spew hyper_threading = Enable nmi = Enable boot_devices = '' boot_default = 0x40 cmos_defaults_loaded = Yes lpt = Enable volume = 0xff tft_brightness = 0xbf first_battery = Primary bluetooth = Enable The code for handling the invalid CMOS space in mainboard.c is now useless and so it was removed. Change-Id: Ic57a14eeeea861aa034cb0884795b0152757bf5b Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Reviewed-on: http://review.coreboot.org/3335 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2013-05-31Lenovo ThinkPad X60: cleanup Native VGA init.Denis 'GNUtoo' Carikli
Change-Id: Iaefa23a6257fd0295357465eb03ccadbef0f70da Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Reviewed-on: http://review.coreboot.org/3272 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-05-26Lenovo ThinkPad T60: Add support for `EARLY_CBMEM_INIT` needed for CBMEM consolePaul Menzel
Add code to support `EARLY_CBMEM_INIT` needed for CBMEM console support by copying GNUtoo’s commit for the Lenovo ThinkPad X60. commit 4560ca5003fe38a066616e8de1a8a414284750fd Author: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Date: Fri Apr 26 12:21:41 2013 +0200 Lenovo ThinkPad X60: Init CBMEM early for CBMEM console support. Reviewed-on: http://review.coreboot.org/3142 Change-Id: I0c4ca5a5e60f4bb3b91653a133ec71039fcca6ab Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/3187 Tested-by: build bot (Jenkins) Reviewed-by: Denis Carikli <GNUtoo@no-log.org> Reviewed-by: Aaron Durbin <adurbin@google.com> Reviewed-by: Nico Huber <nico.huber@secunet.com>
2013-05-04Lenovo ThinkPad X60: Clean up `romstage.c`Paul Menzel
1. Move comment for console init to correct place. 2. Start output with capital letter and add full stop at the end. 3. Add missing »)« at the end of description of GPIO 10. 4. Use tabulators instead of spaces. 5. Indent the code automatically using GNU indent [1] with the `-sc` switch adding stars in front of comment blocks as the good indent manual documents. $ indent -linux -sc src/mainboard/lenovo/x60/romstage.c Leave the numbers left aligned as it is more beneficial to be able to run indent without adapting the result afterward. [1] http://www.coreboot.org/Development_Guidelines#Coding_Style Change-Id: I2fa018ec28ff19d23d68754b565c13a7d7a57355 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/3185 Tested-by: build bot (Jenkins) Reviewed-by: Denis Carikli <GNUtoo@no-log.org> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-04-30Lenovo ThinkPad X60: Init CBMEM early for CBMEM console support.Denis 'GNUtoo' Carikli
Enable `EARLY_CBMEM_INIT` for CBMEM console support by looking how other boards do this. This commit is tested by enabling the CBMEM console (`CONSOLE_CBMEM` in Kconfig) and then in GRUB 2 (as a payload) with the cbmemc command from the cbmemc module and in userspace with ./cbmem -c. Both worked. Change-Id: I34618a55ded7292a411bc232eb76267eec17d91e Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Reviewed-on: http://review.coreboot.org/3142 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@google.com> Tested-by: build bot (Jenkins)
2013-04-16Lenovo ThinkPad X60: Add Native VGA init.Denis 'GNUtoo' Carikli
The code has been taken from the google link mainboard and modified to fit the ThinkPad X60. Change-Id: Ie16e45163acdc651ea46699ecc33055bfd34099c Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Reviewed-on: http://review.coreboot.org/2998 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-22x86: Unify arch/io.h and arch/romcc_io.hStefan Reinauer
Here's the great news: From now on you don't have to worry about hitting the right io.h include anymore. Just forget about romcc_io.h and use io.h instead. This cleanup has a number of advantages, like you don't have to guard device/ includes for SMM and pre RAM anymore. This allows to get rid of a number of ifdefs and will generally make the code more readable and understandable. Potentially in the future some of the code in the io.h __PRE_RAM__ path should move to device.h or other device/ includes instead, but that's another incremental change. Change-Id: I356f06110e2e355e9a5b4b08c132591f36fec7d9 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2872 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-02-14sconfig: rename lapic_cluster -> cpu_clusterStefan Reinauer
The name lapic_cluster is a bit misleading, since the construct is not local APIC specific by concept. As implementations and hardware change, be more generic about our naming. This will allow us to support non-x86 systems without adding new keywords. Change-Id: Icd7f5fcf6f54d242eabb5e14ee151eec8d6cceb1 Signed-off-by: Stefan Reinauer <reinauer@google.com> Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2377 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-02-14sconfig: rename pci_domain -> domainStefan Reinauer
The name pci_domain was a bit misleading, since the construct is only PCI specific in a particular (northbridge/cpu) implementation, but not by concept. As implementations and hardware change, be more generic about our naming. This will allow us to support non-PCI systems without adding new keywords. Change-Id: Ide885a1d5e15d37560c79b936a39252150560e85 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2376 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-02-04Intel based boards: Use tab instead of spaces to align comment in DSDTPaul Menzel
Mainboards using `COREBOOT` as their OEM Table ID in their DSDT header were copied from the same source and therefore had spaces instead of a tab to align that comment for that header field. These are mostly Intel based boards. Fix that in accordance with the coding style [1]. [1] http://www.coreboot.org/Development_Guidelines#Coding_Style Change-Id: I299b955930dbd50b9717e8ff141ce8f3fd534e5f Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/2277 Tested-by: build bot (Jenkins) Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2013-01-03Rename mainboard_smi.c to smihandler.cPatrick Georgi
This mirrors the naming convention of handlers in northbridge and southbridge. Change-Id: I45d97c569991c955f0ae54ce909d8c267e9a5173 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/2058 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-16Fix PIRQ routing abstractionStefan Reinauer
intel_irq_routing_table is a local structure that should not be used globally, because it might not be there on all mainboards. Instead, the API has to be corrected to allow passing a PIRQ table in where needed. Change-Id: Icf08928b67727a366639b648bf6aac8e1a87e765 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1862 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-16Drop unneeded BOARD_HAS_FADT optionStefan Reinauer
Change-Id: Iaaeee87d70cf052bc7980007cdf1f7dda88b3623 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1836 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-16Reduce number of per-mainboard changesStefan Reinauer
- Add mainboard_smi.c from arch/x86/Makefile if it's there - Add mainboard's chromeos.c from the chromeos Makefile Change-Id: I3f80e2cb368f88d2a38036895a19f3576dd9553b Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1835 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-14Move HAVE_SMI_HANDLER from mainboards to chipsetsStefan Reinauer
Change-Id: Ibb6606fe3996e377181872a4544600f2d58c5439 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1834 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-06Drop redundant CHIP_NAME in mainboard.cKyösti Mälkki
Compose the name from Kconfig strings instead. As the field is for debug print use only, a minor change in the output should do no harm. The strings no longer include word "Mainboard". Change-Id: Ifd24f408271eb5a5d1a08a317512ef00cb537ee2 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/1635 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-10-08hpet: common ACPI generationPatrick Georgi
HPET's min ticks (minimum time between events to avoid losing interrupts) is chipset specific, so move it to Kconfig. Via also has a special base address, so move it as well. Apart from these (and the base address was already #defined), the table is very uniform. Change-Id: I848a2e2b0b16021c7ee5ba99097fa6a5886c3286 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/1562 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
2012-08-08Cleanup coreboot memory table includesKyösti Mälkki
The includes removed here were previously required for struct lb_memory and lb_add_memory_range(). Change-Id: Ie6c0d4ef55c2225aa709cf3fbad30ff1080e3610 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/1391 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2012-07-26Drop mainboard chip.hStefan Reinauer
mainboard_config never worked right, at least not since we've had sconfig. Hence, drop mainboard/<vendor>/<device>/chip.h and fix up the mainboards that tried to use it anyways. Change-Id: I7cd403ea188d8a9fd4c1ad15479fa88e02ab8e83 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1359 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-07-12Lenovo X60: correct SDHCI write protect polarityJonathan A. Kollasch
Change-Id: I916deffe2c692042f7e54c936902e77770ee69df Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-on: http://review.coreboot.org/1205 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-06-24X60/T60: fix mptable LINT entriesSven Schnelle
They used MP_IRQ_TRIGGER_LEVEL, but it should be MP_IRQ_TRIGGER_EDGE. While at it, uses mptable_lintsrc() instead. Change-Id: Ie71311b8bf865889cf0d8808467df98af4b0132d Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/1136 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-05-28Enable USE_OPTION_TABLE for ThinkPad X60Motiejus Jakštys
Without this option bluetooth configuration value in nvram is not consulted properly. It also enables built-in volume control (read-only). Tested on: ThinkPad X60s, 1702. Change-Id: I2fc6bb527c6e086a083e63922d1253eda7d4a36d Signed-off-by: Motiejus Jakštys <desired.mta@gmail.com> Reviewed-on: http://review.coreboot.org/985 Tested-by: build bot (Jenkins) Reviewed-by: Sven Schnelle <svens@stackframe.org>
2012-05-01Drop CONFIG_MAX_PHYSICAL_CPUS on non-AMD boardsStefan Reinauer
CONFIG_MAX_PHYSICAL_CPUS is defined by quite a number of mainboards whithout any code actually using the variable. Hence, drop MAX_PHYSICAL_CPUS from Kconfig for those boards. In the long run we should drop CONFIG_MAX_PHYSICAL_CPUS use completely and make the code dynamic or depend on CONFIG_MAX_CPUS instead. Change-Id: I37dcc74d245ddba5186b96bd82220dacb6f4d323 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/984 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-04-30Rework ACPI CST table generationStefan Reinauer
... in order to unify the Sandybridge and Lenovo implementations currently used in the tree. - use acpi_addr_t in acpigen_write_register() - use acpi_cstate_t for cstate tables (and fix up the x60 and t60) - drop cst_entry from acpigen.h Change-Id: Icb87418d44d355f607c4a67300107b40f40b3b3f Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/943 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2012-04-27SMM: unify mainboard APM command handlersStefan Reinauer
rename from mainboard_apm_cnt to mainboard_smi_apmc to match the function naming scheme of the other handlers. Add prototype for mainboard_smi_sleep (mainboard specific S3 sleep handlers in SMM) that is required by Sandybridge. Change-Id: Ib479397e460e33772d90d9d41dba267e4e7e3008 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/933 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-04-20Refactor some alignment handlingPatrick Georgi
Made using coccinelle: @@ expression E; @@ -(E + 7) & -8 +ALIGN(E, 8) @@ expression E; @@ -(E + 15) & -16 +ALIGN(E, 16) Change-Id: I071d2c98cd95580d7de21d256c31b6368a3dc70b Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/910 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-03-16Intel northbridge I945: Apply un-written naming rulesKyösti Mälkki
Use NORTHBRIDGE_INTEL_I945 to select the driver directory for build. Use _SUBTYPE_945GC and _SUBTYPE_945GM to define at compile-time which model of I945 the driver is built for. Change-Id: I11b1e0998d0fc28f8946bad4f0989036a9b18af4 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/684 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-03-08Unify Local APIC address definitionsPatrick Georgi
We used several names for that same value, and hardcoded the value at some more places. They're all LOCAL_APIC_ADDR now (except for lapic specific code that still uses LAPIC_DEFAULT_BASE). Change-Id: I1d4be73b1984f22b7e84681edfadf0588a7589b6 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/676 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-02-22ACPI: More ../../.. removalPatrick Georgi
CPP is ran with src/ as part of its search path, so using <northbridge/...> and the like is safe. Change-Id: I644d60190ac92ef284d5f0b4acf44f7db3c788ee Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/649 Tested-by: build bot (Jenkins)
2012-01-31X60/T60: Add option to enable/disable bluetoothSven Schnelle
Change-Id: I9761a8a9a7cc708fe95169cb8b79b413b97ee523 Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/598 Tested-by: build bot (Jenkins)
2012-01-31X60: fix dockingSven Schnelle
Fix ordering of power/reset/undock procedure to prevent crashes seen with the old code. Also call dlpc_init() only once. Change-Id: I27d1f42e845fcccde40e6ca5af4a7762edab5d36 Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/597 Tested-by: build bot (Jenkins)
2012-01-31mainboard/lenovo/t60, x60: Disable CHECK_SLFRCS_ON_RESUMEPeter Stuge
This makes resume from S3 work. Change-Id: I472baf2fbde46bfac223ce39fc81b8e09849fb7f Signed-off-by: Peter Stuge <peter@stuge.se> Reviewed-on: http://review.coreboot.org/591 Tested-by: build bot (Jenkins) Reviewed-by: Sven Schnelle <svens@stackframe.org>
2012-01-31northbridge/intel/i945: CHECK_SLFRCS_ON_RESUME Kconfig optionPeter Stuge
Originally brought up by Sven Schnelle in March 2011 http://patchwork.coreboot.org/patch/2801/ http://www.coreboot.org/pipermail/coreboot/2011-March/064277.html On some mainboards it may be neccessary to reset early during resume from S3 if the SLFRCS register indicates that a memory channel is not guaranteed to be in self-refresh. On other mainboards, such as Lenovo X60 and T60, the check always creates false positives, effectively making it impossible to resume. The SLFRCS register is documented on page 197 of Mobile Intel® 945 Express Chipset Family Datasheet Document Number: 309219-006 which is publically available, and the register indicates if a memory channel is guaranteed to be in self-refresh mode (if bit = 1), or that a memory channel *may or may not be* in self-refresh mode (if bit = 0). The register can thus only be used to positively learn that memory is in self-refresh. It is not known for sure that memory is *not* in self-refresh. The register is reset by the PWROK signal, which *should* go low during S3, and go high again when resuming, so it is unsurprising that SLFRCS has already been cleared when we read the register. Sven's measurements of the CKE signal on a ThinkPad shows that memory remains in self-refresh indefinitely, until coreboot re-initializes the memory controller, even when SLFRCS bits were = 0. Boards which require a warm reset when SLFRCS bits are cleared must now explicitly enable the check in the mainboard Kconfig file. This commit selects the new option in all existing i945 mainboards. A follow-up commit will remove the option for ThinkPads. Change-Id: I02320675efb8fde05c371ef243ba5093a4da6d11 Signed-off-by: Peter Stuge <peter@stuge.se> Reviewed-on: http://review.coreboot.org/590 Tested-by: build bot (Jenkins) Reviewed-by: Sven Schnelle <svens@stackframe.org>
2012-01-31X60/T60: fix default baudrateSven Schnelle
Value required to get 115200 is actually 0, not 5. Change-Id: Id1385822bf2213c035c4f378a72168ed6676ad03 Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/592 Reviewed-by: Peter Stuge <peter@stuge.se> Tested-by: build bot (Jenkins)
2011-12-14Lenovo X60/T60: add first_battery settingSven Schnelle
The EC allows to select the order in which batteries are (dis)charged. Make this setting available to the user. Change-Id: Id2a98192565419dbb53f3a7cf0b2c46b672a3ed8 Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/475 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Peter Stuge <peter@stuge.se>
2011-12-01X60/T60: reset baudrate loglevel to sane valuesSven Schnelle
Change-Id: Iaf5861e9db0a41a184da6d2e515e3b9afe0655d6 Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/459 Tested-by: build bot (Jenkins)
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