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They're listed in AUTHORS and often incorrect anyway, for example:
- What's a "Copyright $year-present"?
- Which incarnation of Google (Inc, LLC, ...) is the current
copyright holder?
- People sometimes have their editor auto-add themselves to files even
though they only deleted stuff
- Or they let the editor automatically update the copyright year,
because why not?
- Who is the copyright holder "The coreboot project Authors"?
- Or "Generated Code"?
Sidestep all these issues by simply not putting these notices in
individual files, let's list all copyright holders in AUTHORS instead
and use the git history to deal with the rest.
Change-Id: I426518e8e18de1c8efcfb7ecb0835df3e257dca1
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39608
Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: Ia041b63201b2a4a2fe6ab11e3497c460f88061d1
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36784
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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There is some overlap between romstage and bootblock.
LPC setup and BAR initialization is now done twice.
The rationale is that the romstage should not depend too
much on the bootblock, since it can reside in a RO fmap
region.
Enabling the console will be done in a followup patch.
Change-Id: I4d0ba29111a5df6f19033f5ce95adcc0d9adc1fd
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36783
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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The Intel version of ThinkPad X131e can ship with Sandy Bridge or
Ivy Bridge processors. The mainboard uses 8MiB+4MiB flash chips, with
the 8MiB chip containing the IFD and ME, and the 4MiB chip containing
the BIOS. The flash chips can be accessed with an external programmer.
This port was primarily created using autoport, with some parts adapted
from lenovo/x230 and google/stout.
Tested and working:
- Machine type 3367AH5 / Intel Celeron 887 (Sandy Bridge)
- Boots Debian GNU/Linux 9.2 (Linux 4.9.51) via SeaBIOS
- Boot from internal SATA and USB
- Native RAM init
- Native VGA init
- libgfxinit
- VGA and HDMI display output
- Keyboard, trackpoint, touchpad
- Audio (speaker, headphones)
- Ethernet (Realtek)
- Display backlight
- USB 3.0 ports
- "Always on" USB port (EHCI debug)
- SD card reader
- Webcam
- Fan and temperature sensors
- ACPI S3 (Sleep)
- CMOS
- TPM
Not tested:
- WLAN/Bluetooth (Broadcom)
- WWAN/mSATA (no card)
- Other operating systems
Not working or not implemented:
- Fn keys
- ACPI S4 (Hibernation) "Image mismatch: memory size"
Change-Id: If8de3a9308997e2d57aee869023ee9a43a2db872
Signed-off-by: James Ye <jye836@gmail.com>
Reviewed-on: https://review.coreboot.org/20694
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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