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path: root/src/mainboard/lenovo/x131e/Kconfig
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2018-08-05southbridge/intel/bd82x6x/Kconfig: Do not include any IFD by defaultAngel Pons
Since only a handful of boards have descriptor blobs in the tree, it makes no sense to have `HAVE_IFD_BIN` enabled by default then disabled on each mainboard. This patch flips the default value of said variable, rendering all current overrides unnecessary. The few boards which have an IFD in the blobs repo use `select HAVE_IFD_BIN` to enable adding the IFD by default. Since `HAVE_ME_BIN` depends on `HAVE_IFD_BIN`, the former has been removed alongside the latter, and has been added to the boards with a ME blob as `select HAVE_ME_BIN`. Both `HAVE_IFD_BIN` and `HAVE_ME_BIN` have been removed from autoport as well. Change-Id: I330c4886f8bea4b1a8ecad6505a0e5cc381654d1 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/27218 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-06-04security/tpm: Unify the coreboot TPM software stackPhilipp Deppenwiese
* Remove 2nd software stack in pc80 drivers directory. * Create TSPI interface for common usage. * Refactor TSS / TIS code base. * Add vendor tss (Cr50) directory. * Change kconfig options for TPM to TPM1. * Add user / board configuration with: * MAINBOARD_HAS_*_TPM # * BUS driver * MAINBOARD_HAS_TPM1 or MAINBOARD_HAS_TPM2 * Add kconfig TPM user selection (e.g. pluggable TPMs) * Fix existing headers and function calls. * Fix vboot for interface usage and antirollback mode. Change-Id: I7ec277e82a3c20c62a0548a1a2b013e6ce8f5b3f Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org> Reviewed-on: https://review.coreboot.org/24903 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-12-20mb/lenovo: add Lenovo ThinkPad X131e (Intel)James Ye
The Intel version of ThinkPad X131e can ship with Sandy Bridge or Ivy Bridge processors. The mainboard uses 8MiB+4MiB flash chips, with the 8MiB chip containing the IFD and ME, and the 4MiB chip containing the BIOS. The flash chips can be accessed with an external programmer. This port was primarily created using autoport, with some parts adapted from lenovo/x230 and google/stout. Tested and working: - Machine type 3367AH5 / Intel Celeron 887 (Sandy Bridge) - Boots Debian GNU/Linux 9.2 (Linux 4.9.51) via SeaBIOS - Boot from internal SATA and USB - Native RAM init - Native VGA init - libgfxinit - VGA and HDMI display output - Keyboard, trackpoint, touchpad - Audio (speaker, headphones) - Ethernet (Realtek) - Display backlight - USB 3.0 ports - "Always on" USB port (EHCI debug) - SD card reader - Webcam - Fan and temperature sensors - ACPI S3 (Sleep) - CMOS - TPM Not tested: - WLAN/Bluetooth (Broadcom) - WWAN/mSATA (no card) - Other operating systems Not working or not implemented: - Fn keys - ACPI S4 (Hibernation) "Image mismatch: memory size" Change-Id: If8de3a9308997e2d57aee869023ee9a43a2db872 Signed-off-by: James Ye <jye836@gmail.com> Reviewed-on: https://review.coreboot.org/20694 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>