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This should be the sane default, as having this option enabled when the
AT24RF08C (Asset Identification EEPROM) is not present on the mainboard
can cause SMBIOS table entries to become "*INVALID*". This can,
for example, result in strange hostnames when an OS installer uses
SMBIOS information to automatically generate one. On the other hand,
the coreboot generated SMBIOS tables will at least always contain basic
information. Therefore, this driver should be treated as an enhancement
rather than a default.
Currently, the following mainboards have this option disabled:
- ThinkCentre M710s
- ThinkCentre M700 / M900 Tiny
- Haswell ThinkPads
- ThinkPad T440p
- ThinkPad W541
Therefore, we can remove this option entirely on these mainboards. Note
that there may be other mainboards which do not have this chip present
but still have the option enabled. However, this requires a more
detailed investigation which would be out of scope of this change.
TESTS=Timeless builds on lenovo mainboards produce the same binary.
config INCLUDE_CONFIG_FILE
default n
Was temporarily added to `mb/lenovo/Kconfig` during these tests, as
while the configuration does not change, the order of entries do.
Therefore, technically producing a different binary when included.
Change-Id: I5bb101bd6696c39718ee779426d0ec3e721e1b51
Signed-off-by: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84544
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Change-Id: Ic0e0864b99c5078e5b84b9183262b3c47ffcb329
Signed-off-by: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83993
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
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This mainboard does not have AT24RF08C (Asset Identification EEPROM) and
will show "*INVALID*" in the SMBIOS table.
Change-Id: If6f948bc4c63c7afdc8b31e1945d3c3beb99883f
Signed-off-by: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83994
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
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Change-Id: Icc5546a8073c03ce77480b634b367d10d1ad0111
Signed-off-by: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83992
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
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Change-Id: Iaa761108acbf275820ecbec9837b81bc5d64613e
Signed-off-by: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83991
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
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Change-Id: I7114612e686a0bf3cfc241f45fa62077fad16f5a
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83161
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Change-Id: I6ece868184dd772fc2c3c472ae2172d1c34fb179
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81484
Reviewed-by: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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The processor may be a Pentium or 6/7th generation Core i3/i5/i7.
This port was tested on an i5-7400.
Working:
- Can boot Ubuntu 22.04.1 (Linux 6.5.0) using payloads:
- SeaBIOS
- TianoCore EDK 2
- Internal flashing (from coreboot)
- PEG
- PCIe
- SATA
- M.2 SSD
- M.2 WLAN (+ Bluetooth)
- LAN
- USB
- Memory card reader
- CPU fan
- VGA (DP bridge)
- Display ports
- Audio (output)
- COM1
- TPM
Not Working:
- SuperIO related things
- Power button LED
- PCIe clock related things and AER issues (LiveCD)
- Some drm issue when using EDK 2 and libgfxinit (LiveCD)
- ME cleaner
Untested:
- Audio (input)
Won't Test:
- COM2 header
- LPT header
- PS/2 keyboard and mouse
Thanks to Nico Huber and everyone else on the IRC for helping me write
my first port!
Change-Id: I551753aecfbd2c0ee57d85bb22cb943eb21af3cc
Signed-off-by: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80343
Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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