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path: root/src/mainboard/lenovo/haswell/variants
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2023-08-06mainboard: Add SPDX license headers to MakefilesMartin Roth
To help identify the licenses of the various files contained in the coreboot source, we've added SPDX headers to the top of all of the .c and .h files. This extends that practice to Makefiles. Any file in the coreboot project without a specific license is bound to the license of the overall coreboot project, GPL Version 2. This patch adds the GPL V2 license identifier to the top of all makefiles in the mainboard directory that don't already have an SPDX license line at the top. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: Ic451e68b1ad9ccdf34484dd98bd7fca7e177ef22 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68982 Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Reviewed-by: Yidi Lin <yidilin@google.com> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Tim Crawford <tcrawford@system76.com> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2023-04-08ec/lenovo/pmh7/chip.h: Use 'bool' instead of 'int'Elyes Haouas
This to fix following error using Clang-16.0.0: /cb-build/coreboot-toolchain.0/clang/LENOVO_W500/mainboard/lenovo/t400/static.c:135:22: error: implicit truncation from 'int' to a one-bit wide bit-field changes value from 1 to -1 [-Werror,-Wsingle-bit-bitfield-constant-conversion] .backlight_enable = 0x01, ^~~~ /cb-build/coreboot-toolchain.0/clang/LENOVO_W500/mainboard/lenovo/t400/static.c:136:23: error: implicit truncation from 'int' to a one-bit wide bit-field changes value from 1 to -1 [-Werror,-Wsingle-bit-bitfield-constant-conversion] .dock_event_enable = 0x01, ^~~~ Change-Id: Icd35224877fee355e1bbb8a8e838cb047604babb Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73810 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2023-02-07tree: Drop repeated wordsAlexander Goncharov
Found-by: linter Change-Id: I7c6d0887a45fdb4b6de294770a7fdd5545a9479b Signed-off-by: Alexander Goncharov <chat@joursoir.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72795 Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Erik van den Bogaert <ebogaert@eltan.com> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-11-25cpu/intel/haswell: Move chip_ops to cpu clusterArthur Heymans
The cpu cluster is always present and it's the proper device to contain the settings that need to be applied to all cpus. This makes it possible to remove the fake lapic from devicetrees. Change-Id: Ic449b2df8036e8c02b5559cca6b2e7479a70a786 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59314 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2022-11-09nb/intel/haswell: Hook up PCI domain and CPU cluster ops to devicetreeArthur Heymans
Change-Id: I955274bc6bda587201f130762c0735c36f5501d1 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69289 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-10-06mb/lenovo/t440p: Enable PCI 00:01.1 bridge for dGPUNico Huber
An optional dGPU can be connected to the second PEG bridge: -[0000:00]-+-00.0 Intel Corporation Xeon E3-1200 v3/4th Gen Core Processor DRAM Controller +-01.0-[01]-- +-01.1-[02]----00.0 NVIDIA Corporation GK208M [GeForce GT 730M] It's possible that the 01.0 bridge is never populated, but we have to leave it on anyway so 01.1 can be enumerated. Change-Id: Ieab7a7bf3b31b4ee9d9f12b5d827d866c87356e1 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68099 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-07-24mb/lenovo: Integrate W541 into haswell mainboardFelix Singer
Lots of code from lenovo/haswell can be reused for lenovo/w541. Thus, integrate it into lenovo/haswell and make it a variant. Change-Id: If99d842cff777fe27ff63baabc447e69b9d0333c Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63514 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2022-07-24mb/lenovo/haswell: Make INT15 support T440p specificFelix Singer
In preparation to CB:63514, make the INT15 support specific for the T440p variant since the W541 doesn't support it currently. Change-Id: I8dfcc061e1b8a831f75bf9a8035770cb678a85d4 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66106 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-07-10mb/lenovo/haswell: Convert to variant setupFelix Singer
In preparation to CB:63514, make use of the variant concept and convert the existing T440p mainboard into a variant. Change-Id: I3c7e06607135ce0a62c158e296b51e5311234505 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63513 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>