| Age | Commit message (Expand) | Author |
|---|---|---|
| 2016-08-14 | src/mainboard: Capitalize ROM, RAM, CPU and APIC | Elyes HAOUAS |
| 2016-07-31 | Remove extra newlines from the end of all coreboot files. | Martin Roth |
| 2016-06-04 | AGESA boards: Split dispatcher to romstage and ramstage | Kyösti Mälkki |
| 2016-05-10 | AGESA boards: Relocate platform memory config | Kyösti Mälkki |
| 2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
| 2015-06-08 | Remove empty lines at end of file | Elyes HAOUAS |
| 2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
| 2015-05-10 | AGESA: Drop unused AGESA_MEM_TABLE | Kyösti Mälkki |
| 2015-01-06 | Remove AMD's "Release Content" doxygen from coreboot files | Martin Roth |
| 2014-12-06 | mainboard/lenovo/g505s: Toggle on IOMMU support | Edward O'Callaghan |
| 2014-12-06 | mainboard/lenovo/g505s/buildOpts.c: Trivial variable rename | Edward O'Callaghan |
| 2014-11-27 | mainboard/lenovo/g505s: New port Richland APU A10-5750M | Edward O'Callaghan |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |