coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2023-10-25	SNB+MRC boards: Migrate MRC settings to devicetree	Keith Hui
2023-02-04	mb/*: Replace SNB PCI devices with references from chipset.cb	Arthur Heymans
2022-12-01	cpu/intel/model_206ax: Remove fake lapic device	Arthur Heymans
2022-12-01	cpu/intel/sandybridge: Use enum for ACPI C states	Arthur Heymans
2022-11-30	nb/intel/sandybridge: Add a chipset devicetree	Arthur Heymans
2022-01-04	sb/intel: Use `bool` for PCIe coalescing option	Angel Pons
2021-06-07	bd82x6x boards: Drop redundant `c2_latency`	Angel Pons
2021-05-18	mainboard: Use decimal for `device lapic 0x0 on`	Angel Pons
2021-01-06	cpu/intel/model_206ax: Rename `cX_acpower` options	Angel Pons
2021-01-06	cpu/intel/model_206ax: Unify ACPI C-state options	Angel Pons
2020-03-29	drivers/intel/gma/acpi: Provide default definition for displays	Nico Huber
2019-07-19	sb/intel/{bd82x6x\|ibexpeak}: Drop p_cnt_throttling_supported	Patrick Rudolph
2019-01-24	cpu/intel/model_206ax: Remove the notion of sockets	Arthur Heymans
2019-01-23	mb///devicetree.cb: Make sandybridge devicetree uniform	Arthur Heymans
2015-10-17	kontron/ktqm77: Tag all four USB3 ports switchable and SS capable	Nico Huber
2015-05-28	intel: Remove pstate_coord_type.	Vladimir Serbinenko
2015-05-28	igd.asl rewrite	Vladimir Serbinenko
2014-11-23	sandy/ivy/nehalem: Remerge interrupt handling	Vladimir Serbinenko
2014-11-08	bd82x6x: Move to common FADT.	Vladimir Serbinenko
2014-01-12	ibexpeak / bd82x6x: Make SATA mode user-visible option.	Vladimir Serbinenko
2013-06-24	kontron/ktqm77: New board	Nico Huber