coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2010-10-02	Allow selecting the physical USB Debug Port on AMD SB700.	Uwe Hermann
2010-10-01	Move CACHE_AS_RAM_ADDRESS_DEBUG out of romstage.c into Kconfig,	Patrick Georgi
2010-09-28	Remove redundant HW_MEM_HOLE_SIZEK and HW_MEM_HOLE_SIZE_AUTO_INC settings.	Myles Watson
2010-09-25	Drop some useless "../../../" in #includes (trivial).	Uwe Hermann
2010-09-24	Hook up all AMD SB600/SB700 boards to the EHCI Debug Port infrastructure.	Uwe Hermann
2010-09-10	Move memory type information out of some AMD sockets.	Myles Watson
2010-09-07	Remove unused ide0_enable and sata0_enable entries from SB7xx	Rudolf Marek
2010-08-30	We call this cache as ram everywhere, so let's call it the same in Kconfig	Stefan Reinauer
2010-08-30	Restructured all vendors' Kconfig files to no longer source the boards'	Jens Rottmann
2010-08-26	Remove unused mainboard_config definitions. Trivial.	Myles Watson
2010-08-18	The attached file add pa78vm5 dev3 detection function to avoid the building e...	Wang Qing Pei
2010-08-17	Commit (non-working!) Jetway PA78VM5 mainboard	Wang Qing Pei